JPS6452298A - Semiconductor memory device - Google Patents
Semiconductor memory deviceInfo
- Publication number
- JPS6452298A JPS6452298A JP20858887A JP20858887A JPS6452298A JP S6452298 A JPS6452298 A JP S6452298A JP 20858887 A JP20858887 A JP 20858887A JP 20858887 A JP20858887 A JP 20858887A JP S6452298 A JPS6452298 A JP S6452298A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- high voltage
- test
- measurement
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Read Only Memory (AREA)
Abstract
PURPOSE:To facilitate the measurement of a threshold voltage in an erasing condition by impressing a voltage higher than a supply voltage selectively applied to an external input terminal directly to the control gate of a memory transistor in response to the control signal of the supply voltage level. CONSTITUTION:At the time of a test mode, transistors TR Q10 and T1 are turned on by a testing control signal T, a current flow from a high voltage generating circuit 5 to a high voltage switch 4, and a MOS capacitor C1 is changed. In this condition, a circuit 4 raise the potential of a node N2 at every rise and fall of a control clock phi, and the voltage rises near a high voltage VPP. On the other hand, a test voltage applied from an external terminal 14 is given through a TR Q9 and an erasing high voltage pulse line EL to the gate of a TR Q7. Thus, the voltage necessary for the test is applied to a control gate line CGL, and the measurement of the threshold voltage is facilitated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20858887A JPS6452298A (en) | 1987-08-21 | 1987-08-21 | Semiconductor memory device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP20858887A JPS6452298A (en) | 1987-08-21 | 1987-08-21 | Semiconductor memory device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6452298A true JPS6452298A (en) | 1989-02-28 |
Family
ID=16558676
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP20858887A Pending JPS6452298A (en) | 1987-08-21 | 1987-08-21 | Semiconductor memory device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6452298A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5294883A (en) * | 1992-08-04 | 1994-03-15 | International Business Machines Corporation | Test detector/shutoff and method for BiCMOS integrated circuit |
US5375083A (en) * | 1993-02-04 | 1994-12-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit including a substrate having a memory cell array surrounded by a well structure |
US5535160A (en) * | 1993-07-05 | 1996-07-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit |
US6949947B2 (en) | 2003-11-13 | 2005-09-27 | Hynix Semiconductor Inc. | Test mode circuit of semiconductor device |
-
1987
- 1987-08-21 JP JP20858887A patent/JPS6452298A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5294883A (en) * | 1992-08-04 | 1994-03-15 | International Business Machines Corporation | Test detector/shutoff and method for BiCMOS integrated circuit |
US5375083A (en) * | 1993-02-04 | 1994-12-20 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit including a substrate having a memory cell array surrounded by a well structure |
US5535160A (en) * | 1993-07-05 | 1996-07-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor integrated circuit |
US6949947B2 (en) | 2003-11-13 | 2005-09-27 | Hynix Semiconductor Inc. | Test mode circuit of semiconductor device |
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