JPS5771585A - Operation system of semiconductor memory - Google Patents
Operation system of semiconductor memoryInfo
- Publication number
- JPS5771585A JPS5771585A JP55147913A JP14791380A JPS5771585A JP S5771585 A JPS5771585 A JP S5771585A JP 55147913 A JP55147913 A JP 55147913A JP 14791380 A JP14791380 A JP 14791380A JP S5771585 A JPS5771585 A JP S5771585A
- Authority
- JP
- Japan
- Prior art keywords
- trs
- information
- depression type
- pulse
- high speed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C14/00—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down
Landscapes
- Static Random-Access Memory (AREA)
Abstract
PURPOSE:To write information at a high speed and to make it npn-volatile, by inputting 2 kinds of pulses to the gate of an MNOS transistor. CONSTITUTION:Negative voltage is applied to N-MNOS transistors (TRs) TR 15, 16 from a pulse voltage signal line (MG line). As a result, the Trs 15 and 16 become a depression type, both the transistors operate in the same way as an electric conductor of low resistance, and a memory cell operates in the same way as a static RAM constituted of a conventional C-MOS. That is to say, the information is written at a high speed. Subsequently, when a positive pulse is applied to both the gates of the TRs 15 and 16, the TR15 is in a state of a depression type, and on the other hand, the TR16 becomes an enhancement type from the depression type. In this way, even if supply voltage Vcc is turned off, the written information is not varied unless an erase pulse is applied from the MG line once again.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55147913A JPS5771585A (en) | 1980-10-22 | 1980-10-22 | Operation system of semiconductor memory |
US06/311,923 US4403306A (en) | 1980-10-22 | 1981-10-16 | Semiconductor memory operable as static RAM or EAROM |
DE3141555A DE3141555C2 (en) | 1980-10-22 | 1981-10-20 | Semiconductor memory |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55147913A JPS5771585A (en) | 1980-10-22 | 1980-10-22 | Operation system of semiconductor memory |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5771585A true JPS5771585A (en) | 1982-05-04 |
Family
ID=15440930
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55147913A Pending JPS5771585A (en) | 1980-10-22 | 1980-10-22 | Operation system of semiconductor memory |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5771585A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009197543A (en) * | 2008-02-25 | 2009-09-03 | Mitani Sekisan Co Ltd | Pile hole excavating head |
-
1980
- 1980-10-22 JP JP55147913A patent/JPS5771585A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009197543A (en) * | 2008-02-25 | 2009-09-03 | Mitani Sekisan Co Ltd | Pile hole excavating head |
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