JPS5758360A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5758360A
JPS5758360A JP55132528A JP13252880A JPS5758360A JP S5758360 A JPS5758360 A JP S5758360A JP 55132528 A JP55132528 A JP 55132528A JP 13252880 A JP13252880 A JP 13252880A JP S5758360 A JPS5758360 A JP S5758360A
Authority
JP
Japan
Prior art keywords
region
gate electrode
semiconductor device
consisted
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55132528A
Other languages
Japanese (ja)
Other versions
JPH0570308B2 (en
Inventor
Shunpei Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HANDOUTAI ENERUGII KENKYUSHO KK
Semiconductor Energy Laboratory Co Ltd
Original Assignee
HANDOUTAI ENERUGII KENKYUSHO KK
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by HANDOUTAI ENERUGII KENKYUSHO KK, Semiconductor Energy Laboratory Co Ltd filed Critical HANDOUTAI ENERUGII KENKYUSHO KK
Priority to JP55132528A priority Critical patent/JPS5758360A/en
Priority to US06/304,882 priority patent/US4654680A/en
Publication of JPS5758360A publication Critical patent/JPS5758360A/en
Priority to US06/502,629 priority patent/US4541166A/en
Priority to US06/769,339 priority patent/US4721988A/en
Priority to US06/769,383 priority patent/US4717941A/en
Priority to US06/769,379 priority patent/US4729002A/en
Priority to US06/769,340 priority patent/US4725871A/en
Publication of JPH0570308B2 publication Critical patent/JPH0570308B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568Lateral single gate silicon transistors
    • H01L29/66659Lateral single gate silicon transistors with asymmetry in the channel direction, e.g. lateral high-voltage MISFETs with drain offset region, extended drain MISFETs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28123Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
    • H01L21/2815Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects part or whole of the electrode is a sidewall spacer or made by a similar technique, e.g. transformation under mask, plating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823468MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate sidewall spacers, e.g. double spacers, particular spacer material or shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/20Resistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41775Source or drain electrodes for field effect devices characterised by the proximity or the relative position of the source or drain electrode and the gate electrode, e.g. the source or drain electrode separated from the gate electrode by side-walls or spreading around or above the gate electrode
    • H01L29/41783Raised source or drain electrodes self aligned with the gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/01Manufacture or treatment
    • H10B12/02Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/05Making the transistor

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a gate electrode of semiconductor device being reinforced dynamically by a method wherein the gate electrode is made as the side part thereof to lean against the first region being enabled to constitute the source and drain. CONSTITUTION:A field insulator 2 is buried in the surface of an Si single crystal substrate by the selective oxidation method, and the first region 3 is formed on the surface thereof with an Si semiconductor being doped with an N<+> type impurity by depressurized vapor phase growth. An insulating region 4 is provided on the side circumference and on the upper side of the region 3. The triangular gate electrode 6 being consisted of the first and the second layers consisted of at least two conductors or semiconductors is provided at the corner part between the region 4 and the substrate 1, and the second two regions 13 are provided beneath the electrode 6 and one ends of two electrodes separately from the region 3.
JP55132528A 1980-09-24 1980-09-24 Semiconductor device Granted JPS5758360A (en)

Priority Applications (7)

Application Number Priority Date Filing Date Title
JP55132528A JPS5758360A (en) 1980-09-24 1980-09-24 Semiconductor device
US06/304,882 US4654680A (en) 1980-09-24 1981-09-23 Sidewall gate IGFET
US06/502,629 US4541166A (en) 1980-09-24 1983-06-09 Method of making semiconductor deivce using a conductive layer as mask
US06/769,339 US4721988A (en) 1980-09-24 1985-08-26 Self-aligned dual-gate igfet assembly
US06/769,383 US4717941A (en) 1980-09-24 1985-08-26 Sidewall multiple-gate IGFET
US06/769,379 US4729002A (en) 1980-09-24 1985-08-26 Self-aligned sidewall gate IGFET
US06/769,340 US4725871A (en) 1980-09-24 1985-08-26 Depletion mode short channel IGFET

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55132528A JPS5758360A (en) 1980-09-24 1980-09-24 Semiconductor device

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP20743892A Division JPH0671081B2 (en) 1992-07-10 1992-07-10 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5758360A true JPS5758360A (en) 1982-04-08
JPH0570308B2 JPH0570308B2 (en) 1993-10-04

Family

ID=15083391

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55132528A Granted JPS5758360A (en) 1980-09-24 1980-09-24 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5758360A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55110078A (en) * 1979-02-12 1980-08-25 Tektronix Inc Insulated gate semiconductor amplifier

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55110078A (en) * 1979-02-12 1980-08-25 Tektronix Inc Insulated gate semiconductor amplifier

Also Published As

Publication number Publication date
JPH0570308B2 (en) 1993-10-04

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