JPS5753984B2 - - Google Patents
Info
- Publication number
- JPS5753984B2 JPS5753984B2 JP50066657A JP6665775A JPS5753984B2 JP S5753984 B2 JPS5753984 B2 JP S5753984B2 JP 50066657 A JP50066657 A JP 50066657A JP 6665775 A JP6665775 A JP 6665775A JP S5753984 B2 JPS5753984 B2 JP S5753984B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/90—Masterslice integrated circuits
- H10D84/901—Masterslice integrated circuits comprising bipolar technology
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US48346374A | 1974-06-26 | 1974-06-26 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5125085A JPS5125085A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1976-03-01 |
| JPS5753984B2 true JPS5753984B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1982-11-16 |
Family
ID=23920133
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50066657A Expired JPS5753984B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1974-06-26 | 1975-06-04 | |
| JP58195409A Pending JPS5989435A (ja) | 1974-06-26 | 1983-10-20 | プレ−ナ半導体集積回路 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58195409A Pending JPS5989435A (ja) | 1974-06-26 | 1983-10-20 | プレ−ナ半導体集積回路 |
Country Status (8)
Families Citing this family (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1604550A (en) * | 1977-05-31 | 1981-12-09 | Fujitsu Ltd | Method for forming an integrated circuit and an integrated circuit formed by the method |
| CA1102009A (en) * | 1977-09-06 | 1981-05-26 | Algirdas J. Gruodis | Integrated circuit layout utilizing separated active circuit and wiring regions |
| DE2822011C3 (de) * | 1978-05-19 | 1987-09-10 | Fujitsu Ltd., Kawasaki, Kanagawa | Halbleiteranordnung und Verfahren zu deren Herstellung |
| US4249193A (en) * | 1978-05-25 | 1981-02-03 | International Business Machines Corporation | LSI Semiconductor device and fabrication thereof |
| FR2443185A1 (fr) * | 1978-11-30 | 1980-06-27 | Ibm | Topologie de circuits integres semi-conducteurs et procede pour l'obtention de cette topologie |
| JPS5712534A (en) * | 1980-06-27 | 1982-01-22 | Hitachi Ltd | Semiconductor device |
| FR2495834A1 (fr) * | 1980-12-05 | 1982-06-11 | Cii Honeywell Bull | Dispositif a circuits integres de haute densite |
| JPS57186350A (en) * | 1981-05-13 | 1982-11-16 | Hitachi Ltd | Semiconductor integrated circuit device |
| JPS58112343A (ja) * | 1981-12-26 | 1983-07-04 | Olympus Optical Co Ltd | 半導体装置およびその製造方法 |
| JPS58143550A (ja) * | 1982-02-22 | 1983-08-26 | Nec Corp | 半導体装置 |
| JPS5943548A (ja) * | 1982-09-06 | 1984-03-10 | Hitachi Ltd | 半導体集積回路装置 |
| JPS59103455U (ja) * | 1982-12-28 | 1984-07-12 | 富士通株式会社 | 半導体装置 |
| EP0113828B1 (en) * | 1983-01-12 | 1990-02-28 | International Business Machines Corporation | Master slice semiconductor chip having a new multi-function fet cell |
| JPS59159558A (ja) * | 1983-03-01 | 1984-09-10 | Toshiba Corp | 半導体基板 |
| JPS63278249A (ja) * | 1986-12-26 | 1988-11-15 | Toshiba Corp | 半導体集積回路装置の配線方法 |
| EP0387812A3 (en) * | 1989-03-14 | 1992-08-05 | Fujitsu Limited | Bipolar integrated circuit having a unit block structure |
| DE10317018A1 (de) | 2003-04-11 | 2004-11-18 | Infineon Technologies Ag | Multichipmodul mit mehreren Halbleiterchips sowie Leiterplatte mit mehreren Komponenten |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR1064185A (fr) * | 1967-05-23 | 1954-05-11 | Philips Nv | Procédé de fabrication d'un système d'électrodes |
| DE1789138B2 (de) * | 1967-06-23 | 1976-12-09 | Ausscheidung aus: 17 65 632 RCA Corp., New York, N.Y. (V.St.A.) | Aus einheitszellen aufgebaute lsi- schaltung |
| US3558992A (en) * | 1968-06-17 | 1971-01-26 | Rca Corp | Integrated circuit having bonding pads over unused active area components |
| US3584269A (en) * | 1968-10-11 | 1971-06-08 | Ibm | Diffused equal impedance interconnections for integrated circuits |
| US3656028A (en) * | 1969-05-12 | 1972-04-11 | Ibm | Construction of monolithic chip and method of distributing power therein for individual electronic devices constructed thereon |
| US3621562A (en) * | 1970-04-29 | 1971-11-23 | Sylvania Electric Prod | Method of manufacturing integrated circuit arrays |
| US3771217A (en) * | 1971-04-16 | 1973-11-13 | Texas Instruments Inc | Integrated circuit arrays utilizing discretionary wiring and method of fabricating same |
| US3725743A (en) * | 1971-05-19 | 1973-04-03 | Hitachi Ltd | Multilayer wiring structure |
| US3808475A (en) * | 1972-07-10 | 1974-04-30 | Amdahl Corp | Lsi chip construction and method |
-
1975
- 1975-04-22 CA CA225,413A patent/CA1024661A/en not_active Expired
- 1975-05-13 IT IT23253/75A patent/IT1038108B/it active
- 1975-05-21 GB GB21875/75A patent/GB1513893A/en not_active Expired
- 1975-05-21 FR FR7516533A patent/FR2276693A1/fr active Granted
- 1975-05-26 DE DE19752523221 patent/DE2523221A1/de active Granted
- 1975-06-04 JP JP50066657A patent/JPS5753984B2/ja not_active Expired
- 1975-06-16 CH CH775675A patent/CH583970A5/xx not_active IP Right Cessation
- 1975-06-18 ES ES438666A patent/ES438666A1/es not_active Expired
-
1983
- 1983-10-20 JP JP58195409A patent/JPS5989435A/ja active Pending
Also Published As
| Publication number | Publication date |
|---|---|
| ES438666A1 (es) | 1977-03-16 |
| DE2523221C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-09-17 |
| IT1038108B (it) | 1979-11-20 |
| FR2276693B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-04-15 |
| GB1513893A (en) | 1978-06-14 |
| JPS5125085A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1976-03-01 |
| JPS5989435A (ja) | 1984-05-23 |
| CA1024661A (en) | 1978-01-17 |
| FR2276693A1 (fr) | 1976-01-23 |
| CH583970A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1977-01-14 |
| DE2523221A1 (de) | 1976-01-15 |