JPS575362A - Charge injecting method - Google Patents
Charge injecting methodInfo
- Publication number
- JPS575362A JPS575362A JP7919580A JP7919580A JPS575362A JP S575362 A JPS575362 A JP S575362A JP 7919580 A JP7919580 A JP 7919580A JP 7919580 A JP7919580 A JP 7919580A JP S575362 A JPS575362 A JP S575362A
- Authority
- JP
- Japan
- Prior art keywords
- type
- substrate
- gate electrodes
- pulse
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 abstract 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 2
- 229910052581 Si3N4 Inorganic materials 0.000 abstract 1
- 229910052681 coesite Inorganic materials 0.000 abstract 1
- 229910052906 cristobalite Inorganic materials 0.000 abstract 1
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 239000000377 silicon dioxide Substances 0.000 abstract 1
- 235000012239 silicon dioxide Nutrition 0.000 abstract 1
- 229910052682 stishovite Inorganic materials 0.000 abstract 1
- 229910052905 tridymite Inorganic materials 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/762—Charge transfer devices
- H01L29/765—Charge-coupled devices
- H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Solid State Image Pick-Up Elements (AREA)
Abstract
PURPOSE:To perform the charge injection amount into a double dielectric layer with one type of pulse by connecting in series consecutive gates of double insulating gate type CCD via a voltage drop element, applying a voltage at both ends and injecting charge sequentially increasing thereto. CONSTITUTION:A resistance element 12 is connected between the terminals 11 of various gate electrodes 4 of an MNOS type CCD10, and the terinal 13 is connected via a resistance element 14 to an N type Si substrate 1. When negative voltage pulse 16 is applied between the terminal 15 and the substrate 1, the negative voltage pulse of the magnitude divided by resistors is applied between the respective gate electrodes 4 and the substrate, holes of the quantity corresponding to the applied voltage are injected into an Si3N4/SiO2 layer under the respective gate electrodes 4, and are held. Since the quantity of the holes are sequentially varied and the potential well is sequentially varied in one direction, the unity of the transfer direction in driving the two-phase clock pulse drive can be secured.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7919580A JPS575362A (en) | 1980-06-12 | 1980-06-12 | Charge injecting method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP7919580A JPS575362A (en) | 1980-06-12 | 1980-06-12 | Charge injecting method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS575362A true JPS575362A (en) | 1982-01-12 |
| JPS6217879B2 JPS6217879B2 (en) | 1987-04-20 |
Family
ID=13683186
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP7919580A Granted JPS575362A (en) | 1980-06-12 | 1980-06-12 | Charge injecting method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS575362A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5498161A (en) * | 1978-01-19 | 1979-08-02 | Murata Manufacturing Co | Filter |
| WO2003005371A1 (en) * | 2001-07-02 | 2003-01-16 | Infineon Technologies Ag | Charge coupled eeprom device and corresponding method of operation |
-
1980
- 1980-06-12 JP JP7919580A patent/JPS575362A/en active Granted
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5498161A (en) * | 1978-01-19 | 1979-08-02 | Murata Manufacturing Co | Filter |
| JPS5829882B2 (en) * | 1978-01-19 | 1983-06-25 | 株式会社村田製作所 | filter |
| WO2003005371A1 (en) * | 2001-07-02 | 2003-01-16 | Infineon Technologies Ag | Charge coupled eeprom device and corresponding method of operation |
| US7212437B2 (en) | 2001-07-02 | 2007-05-01 | Massimo Atti | Charge coupled EEPROM device and corresponding method of operation |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6217879B2 (en) | 1987-04-20 |
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