JPS54157088A - Charge coupled arithmetic unit - Google Patents

Charge coupled arithmetic unit

Info

Publication number
JPS54157088A
JPS54157088A JP6591178A JP6591178A JPS54157088A JP S54157088 A JPS54157088 A JP S54157088A JP 6591178 A JP6591178 A JP 6591178A JP 6591178 A JP6591178 A JP 6591178A JP S54157088 A JPS54157088 A JP S54157088A
Authority
JP
Japan
Prior art keywords
electrode
region
fitted
gate electrode
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6591178A
Other languages
Japanese (ja)
Other versions
JPS575064B2 (en
Inventor
Yoshihiro Miyamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP6591178A priority Critical patent/JPS54157088A/en
Publication of JPS54157088A publication Critical patent/JPS54157088A/en
Publication of JPS575064B2 publication Critical patent/JPS575064B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To obtain various functional values by simple structure and drive by providing two gate electrodes closely to each other and changing the width of the active regiona under one gate electrode and performing charge coupling between them. CONSTITUTION:N-type source region S is formed on P-type Si substrate A by diffusion, and the first insulating gate electrode 1 having width W1 and the high- resistivity second insulating gate electrode 2 which is brought into contact with gate electrode 1 and has wider width W2 and consistis of poly crystal Si and formed through an insulating film on substrate A while they are interposed between channel stops CS. Next, transfer electrode 31 is fitted to active region 3 generated under electrode 2, and this region is used as a charge transfer device. After that, terminal 4 for negative pulse application and terminal 5 for applying a voltage to electrode 1 are fitted to region S, and further, terminals 6 and 7 for applying a voltage to electrode 2 through ohmic contacts 2a and 2b are fitted to region S. In this constitution, when a voltage is applied to electrode 1, a potential well having inclination is generated under electrode 2, and tertiary functional arithmetic values can be taken out from electrode 2 as voltages.
JP6591178A 1978-05-31 1978-05-31 Charge coupled arithmetic unit Granted JPS54157088A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6591178A JPS54157088A (en) 1978-05-31 1978-05-31 Charge coupled arithmetic unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6591178A JPS54157088A (en) 1978-05-31 1978-05-31 Charge coupled arithmetic unit

Publications (2)

Publication Number Publication Date
JPS54157088A true JPS54157088A (en) 1979-12-11
JPS575064B2 JPS575064B2 (en) 1982-01-28

Family

ID=13300613

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6591178A Granted JPS54157088A (en) 1978-05-31 1978-05-31 Charge coupled arithmetic unit

Country Status (1)

Country Link
JP (1) JPS54157088A (en)

Also Published As

Publication number Publication date
JPS575064B2 (en) 1982-01-28

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