JPS5781622A - Current source - Google Patents
Current sourceInfo
- Publication number
- JPS5781622A JPS5781622A JP15651480A JP15651480A JPS5781622A JP S5781622 A JPS5781622 A JP S5781622A JP 15651480 A JP15651480 A JP 15651480A JP 15651480 A JP15651480 A JP 15651480A JP S5781622 A JPS5781622 A JP S5781622A
- Authority
- JP
- Japan
- Prior art keywords
- source
- output terminal
- current
- type
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/24—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations wherein the transistors are of the field-effect type only
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Electromagnetism (AREA)
- General Physics & Mathematics (AREA)
- Radar, Positioning & Navigation (AREA)
- Automation & Control Theory (AREA)
- Control Of Electrical Variables (AREA)
Abstract
PURPOSE:To obtain a current source of a high output resistance, by providing the second MOSFET between an output terminal and the source of a D type MOSFET constituting a current source. CONSTITUTION:An E type MOSFET12 where the gate is connected to the drain is connected between the source of a D type MOSFET11 and an output terminal 20. The gate of the D type MOSFET11 is connected to the output terminal 20, and the drain is connected to the other output terminal 30. When the voltage across terminals 20 and 30 becomes higher, the current flowed to the FET11 tends to rise by the influence of the channel length modulation effect; however, the increment of this current increases the voltage drop of the FET12, and the voltage between the gate and the source of the FET11 is reduced to suppress the increment of the current.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15651480A JPS5781622A (en) | 1980-11-07 | 1980-11-07 | Current source |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15651480A JPS5781622A (en) | 1980-11-07 | 1980-11-07 | Current source |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5781622A true JPS5781622A (en) | 1982-05-21 |
Family
ID=15629432
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15651480A Pending JPS5781622A (en) | 1980-11-07 | 1980-11-07 | Current source |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5781622A (en) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60500641A (en) * | 1983-02-18 | 1985-05-02 | アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド | MOS depletion load circuit |
US4600876A (en) * | 1985-09-23 | 1986-07-15 | Gte Communication Systems Corp. | Integrated bootstrap bias circuit |
FR2611283A1 (en) * | 1987-02-19 | 1988-08-26 | Em Microelectronic Marin Sa | DEVICE COMPRISING AN ELECTRONIC CIRCUIT FOR PROCESSING AN ANALOG SIGNAL |
CN104035472A (en) * | 2014-06-24 | 2014-09-10 | 吴江圣博瑞信息科技有限公司 | Full-CMOS (complementary metal oxide semiconductor) reference voltage source generator circuit |
JP2019176287A (en) * | 2018-03-28 | 2019-10-10 | セイコーエプソン株式会社 | Constant current circuit, semiconductor device, electronic apparatus, and method for manufacturing semiconductor device |
CN110879625A (en) * | 2019-12-13 | 2020-03-13 | 东南大学 | CMOS voltage reference circuit with ultralow linear sensitivity |
-
1980
- 1980-11-07 JP JP15651480A patent/JPS5781622A/en active Pending
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60500641A (en) * | 1983-02-18 | 1985-05-02 | アドバンスト・マイクロ・ディバイシズ・インコ−ポレ−テッド | MOS depletion load circuit |
US4600876A (en) * | 1985-09-23 | 1986-07-15 | Gte Communication Systems Corp. | Integrated bootstrap bias circuit |
FR2611283A1 (en) * | 1987-02-19 | 1988-08-26 | Em Microelectronic Marin Sa | DEVICE COMPRISING AN ELECTRONIC CIRCUIT FOR PROCESSING AN ANALOG SIGNAL |
CN104035472A (en) * | 2014-06-24 | 2014-09-10 | 吴江圣博瑞信息科技有限公司 | Full-CMOS (complementary metal oxide semiconductor) reference voltage source generator circuit |
JP2019176287A (en) * | 2018-03-28 | 2019-10-10 | セイコーエプソン株式会社 | Constant current circuit, semiconductor device, electronic apparatus, and method for manufacturing semiconductor device |
CN110879625A (en) * | 2019-12-13 | 2020-03-13 | 东南大学 | CMOS voltage reference circuit with ultralow linear sensitivity |
CN110879625B (en) * | 2019-12-13 | 2022-02-11 | 东南大学 | CMOS voltage reference circuit with ultralow linear sensitivity |
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