JPS5726928A - Logical circuit using junction gate type field effect transistor - Google Patents

Logical circuit using junction gate type field effect transistor

Info

Publication number
JPS5726928A
JPS5726928A JP10148880A JP10148880A JPS5726928A JP S5726928 A JPS5726928 A JP S5726928A JP 10148880 A JP10148880 A JP 10148880A JP 10148880 A JP10148880 A JP 10148880A JP S5726928 A JPS5726928 A JP S5726928A
Authority
JP
Japan
Prior art keywords
gate
field effect
effect transistor
type field
gate type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10148880A
Other languages
Japanese (ja)
Inventor
Michihiro Kozuka
Asamitsu Tosaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP10148880A priority Critical patent/JPS5726928A/en
Publication of JPS5726928A publication Critical patent/JPS5726928A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0952—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using Schottky type FET MESFET

Abstract

PURPOSE:To change the ratio of the gate width and to set the load condition, by making MESFETs for logical operation and load the same normally-off type. CONSTITUTION:When a terminal voltage V of a load is minute, the channel is closed with a gate depletion layer 5 and no current flows. When the voltage V increases, since the gate electode is electrically in floating, it has a positive potential to the source electrode and a current I starts flowing to a GaAs operation layer 2. When the voltage V further increases, the potential of the gate electrode is increased and the current I is saturated with the same mechanism as a conventional GaAS MESFET in which the gate electrode is not opened.
JP10148880A 1980-07-24 1980-07-24 Logical circuit using junction gate type field effect transistor Pending JPS5726928A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10148880A JPS5726928A (en) 1980-07-24 1980-07-24 Logical circuit using junction gate type field effect transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10148880A JPS5726928A (en) 1980-07-24 1980-07-24 Logical circuit using junction gate type field effect transistor

Publications (1)

Publication Number Publication Date
JPS5726928A true JPS5726928A (en) 1982-02-13

Family

ID=14302078

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10148880A Pending JPS5726928A (en) 1980-07-24 1980-07-24 Logical circuit using junction gate type field effect transistor

Country Status (1)

Country Link
JP (1) JPS5726928A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61293021A (en) * 1985-04-25 1986-12-23 トライクイント　セミコンダクタ　インコ−ポレイテツド Integrated logical circuit
JPH0648417U (en) * 1992-12-14 1994-07-05 大可工業株式会社 Shoulder box

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5066143A (en) * 1973-10-12 1975-06-04
JPS5419350A (en) * 1977-07-14 1979-02-14 Fujitsu Ltd Load circuit

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5066143A (en) * 1973-10-12 1975-06-04
JPS5419350A (en) * 1977-07-14 1979-02-14 Fujitsu Ltd Load circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61293021A (en) * 1985-04-25 1986-12-23 トライクイント　セミコンダクタ　インコ−ポレイテツド Integrated logical circuit
JPH0648417U (en) * 1992-12-14 1994-07-05 大可工業株式会社 Shoulder box

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