JPS5750431A - Forming method for minute pattern - Google Patents

Forming method for minute pattern

Info

Publication number
JPS5750431A
JPS5750431A JP55125779A JP12577980A JPS5750431A JP S5750431 A JPS5750431 A JP S5750431A JP 55125779 A JP55125779 A JP 55125779A JP 12577980 A JP12577980 A JP 12577980A JP S5750431 A JPS5750431 A JP S5750431A
Authority
JP
Japan
Prior art keywords
film
pattern
polysilicon film
oxide film
forming method
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55125779A
Other languages
English (en)
Inventor
Tadahiro Takigawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55125779A priority Critical patent/JPS5750431A/ja
Publication of JPS5750431A publication Critical patent/JPS5750431A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass

Landscapes

  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP55125779A 1980-09-10 1980-09-10 Forming method for minute pattern Pending JPS5750431A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55125779A JPS5750431A (en) 1980-09-10 1980-09-10 Forming method for minute pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55125779A JPS5750431A (en) 1980-09-10 1980-09-10 Forming method for minute pattern

Publications (1)

Publication Number Publication Date
JPS5750431A true JPS5750431A (en) 1982-03-24

Family

ID=14918626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55125779A Pending JPS5750431A (en) 1980-09-10 1980-09-10 Forming method for minute pattern

Country Status (1)

Country Link
JP (1) JPS5750431A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61173252A (ja) * 1985-01-28 1986-08-04 Mitsubishi Electric Corp フォトマスクブランクの形成方法
JPH02502596A (ja) * 1987-12-19 1990-08-16 ミテル　セミコンダクター　リミテッド 半導体装置の製造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51127680A (en) * 1975-04-28 1976-11-06 Toshiba Corp Manufacturing process of semiconductor device
JPS5526619A (en) * 1978-08-15 1980-02-26 Toshiba Corp Method of producing semiconductor device
JPS5578546A (en) * 1978-12-11 1980-06-13 Toshiba Corp Manufacture of semiconductor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51127680A (en) * 1975-04-28 1976-11-06 Toshiba Corp Manufacturing process of semiconductor device
JPS5526619A (en) * 1978-08-15 1980-02-26 Toshiba Corp Method of producing semiconductor device
JPS5578546A (en) * 1978-12-11 1980-06-13 Toshiba Corp Manufacture of semiconductor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61173252A (ja) * 1985-01-28 1986-08-04 Mitsubishi Electric Corp フォトマスクブランクの形成方法
JPH02502596A (ja) * 1987-12-19 1990-08-16 ミテル　セミコンダクター　リミテッド 半導体装置の製造方法

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