JPS5748258A - Semiconductor memory - Google Patents

Semiconductor memory

Info

Publication number
JPS5748258A
JPS5748258A JP12432480A JP12432480A JPS5748258A JP S5748258 A JPS5748258 A JP S5748258A JP 12432480 A JP12432480 A JP 12432480A JP 12432480 A JP12432480 A JP 12432480A JP S5748258 A JPS5748258 A JP S5748258A
Authority
JP
Japan
Prior art keywords
film
junction
type
prom
semiconductor memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12432480A
Other languages
English (en)
Inventor
Norio Kususe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP12432480A priority Critical patent/JPS5748258A/ja
Publication of JPS5748258A publication Critical patent/JPS5748258A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Semiconductor Memories (AREA)
  • Read Only Memory (AREA)
JP12432480A 1980-09-08 1980-09-08 Semiconductor memory Pending JPS5748258A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12432480A JPS5748258A (en) 1980-09-08 1980-09-08 Semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12432480A JPS5748258A (en) 1980-09-08 1980-09-08 Semiconductor memory

Publications (1)

Publication Number Publication Date
JPS5748258A true JPS5748258A (en) 1982-03-19

Family

ID=14882514

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12432480A Pending JPS5748258A (en) 1980-09-08 1980-09-08 Semiconductor memory

Country Status (1)

Country Link
JP (1) JPS5748258A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0049512A2 (en) * 1980-10-07 1982-04-14 Kabushiki Kaisha Toshiba Semiconductor memory device
JPS63115374A (ja) * 1986-10-31 1988-05-19 Nec Corp 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0049512A2 (en) * 1980-10-07 1982-04-14 Kabushiki Kaisha Toshiba Semiconductor memory device
JPS63115374A (ja) * 1986-10-31 1988-05-19 Nec Corp 半導体装置

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