JPS574160A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS574160A
JPS574160A JP7718580A JP7718580A JPS574160A JP S574160 A JPS574160 A JP S574160A JP 7718580 A JP7718580 A JP 7718580A JP 7718580 A JP7718580 A JP 7718580A JP S574160 A JPS574160 A JP S574160A
Authority
JP
Japan
Prior art keywords
conductive layer
radiation
electromagnetic waves
delay wire
generating circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7718580A
Other languages
Japanese (ja)
Inventor
Nobuo Suzuki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP7718580A priority Critical patent/JPS574160A/en
Publication of JPS574160A publication Critical patent/JPS574160A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/552Protection against radiation, e.g. light or electromagnetic waves
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/762Charge transfer devices
    • H01L29/765Charge-coupled devices
    • H01L29/768Charge-coupled devices with field effect produced by an insulated gate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Microelectronics & Electronic Packaging (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

PURPOSE:To prevent the radiation of electromagnetic waves from a high-frequency electric signal generating circuit by a method wherein a conductive layer is mounted to the high-frequency electric signal generating circuit through an insulating layer, and the conductive layer is held at predetermined potential. CONSTITUTION:A charge transfer type delay wire 3 and a pulse generating circuit section 4 driving the delay wire 3 are mounted onto a semiconductor substrate 2. Pad terminals 9-16 are set up in order to connect other semiconductor elements 5-8 disposed onto the substrate 2 by bonding wires. The conductive layer 17 for preventing the radiation of electromagnetic waves is formed through the insulating layer so as to cover the delay wire 3 and the circuit section 4. The conductive layer 17 is connected to reference potential through pad terminals 18, 19. According to such constitution, electromagnetic waves generated at the circuit section 4 and the delay wire 3 damp by the conductive layer 17, and the amount of radiation to the outside is reduced extremely.
JP7718580A 1980-06-10 1980-06-10 Semiconductor device Pending JPS574160A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7718580A JPS574160A (en) 1980-06-10 1980-06-10 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7718580A JPS574160A (en) 1980-06-10 1980-06-10 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS574160A true JPS574160A (en) 1982-01-09

Family

ID=13626749

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7718580A Pending JPS574160A (en) 1980-06-10 1980-06-10 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS574160A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0399460A (en) * 1989-09-12 1991-04-24 Mitsubishi Electric Corp Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0399460A (en) * 1989-09-12 1991-04-24 Mitsubishi Electric Corp Semiconductor device

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