JPS57211781A - Patterning method of double stacking thin film - Google Patents

Patterning method of double stacking thin film

Info

Publication number
JPS57211781A
JPS57211781A JP56097878A JP9787881A JPS57211781A JP S57211781 A JPS57211781 A JP S57211781A JP 56097878 A JP56097878 A JP 56097878A JP 9787881 A JP9787881 A JP 9787881A JP S57211781 A JPS57211781 A JP S57211781A
Authority
JP
Japan
Prior art keywords
etching
thin film
silicon
stacking thin
double stacking
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56097878A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0151052B2 (enrdf_load_stackoverflow
Inventor
Mamoru Takeda
Hiroshi Yamazoe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP56097878A priority Critical patent/JPS57211781A/ja
Publication of JPS57211781A publication Critical patent/JPS57211781A/ja
Publication of JPH0151052B2 publication Critical patent/JPH0151052B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]

Landscapes

  • Weting (AREA)
JP56097878A 1981-06-24 1981-06-24 Patterning method of double stacking thin film Granted JPS57211781A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56097878A JPS57211781A (en) 1981-06-24 1981-06-24 Patterning method of double stacking thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56097878A JPS57211781A (en) 1981-06-24 1981-06-24 Patterning method of double stacking thin film

Publications (2)

Publication Number Publication Date
JPS57211781A true JPS57211781A (en) 1982-12-25
JPH0151052B2 JPH0151052B2 (enrdf_load_stackoverflow) 1989-11-01

Family

ID=14204000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56097878A Granted JPS57211781A (en) 1981-06-24 1981-06-24 Patterning method of double stacking thin film

Country Status (1)

Country Link
JP (1) JPS57211781A (enrdf_load_stackoverflow)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62299035A (ja) * 1986-06-18 1987-12-26 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS63293981A (ja) * 1987-05-27 1988-11-30 Hitachi Ltd 薄膜トランジスタの製造方法
JPS6432635A (en) * 1987-07-22 1989-02-02 Alps Electric Co Ltd Manufacture of thin-film element substrate

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62299035A (ja) * 1986-06-18 1987-12-26 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPS63293981A (ja) * 1987-05-27 1988-11-30 Hitachi Ltd 薄膜トランジスタの製造方法
JPS6432635A (en) * 1987-07-22 1989-02-02 Alps Electric Co Ltd Manufacture of thin-film element substrate

Also Published As

Publication number Publication date
JPH0151052B2 (enrdf_load_stackoverflow) 1989-11-01

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