JPS57211628A - Controller for shared input and output loop bus of multicomputer system - Google Patents

Controller for shared input and output loop bus of multicomputer system

Info

Publication number
JPS57211628A
JPS57211628A JP56095248A JP9524881A JPS57211628A JP S57211628 A JPS57211628 A JP S57211628A JP 56095248 A JP56095248 A JP 56095248A JP 9524881 A JP9524881 A JP 9524881A JP S57211628 A JPS57211628 A JP S57211628A
Authority
JP
Japan
Prior art keywords
input
output devices
occupation
issued
multicomputer system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56095248A
Other languages
English (en)
Japanese (ja)
Other versions
JPS614135B2 (enExample
Inventor
Hiroshi Kobayashi
Hiroaki Nakanishi
Seiichi Yasumoto
Yasushi Fukunaga
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56095248A priority Critical patent/JPS57211628A/ja
Publication of JPS57211628A publication Critical patent/JPS57211628A/ja
Publication of JPS614135B2 publication Critical patent/JPS614135B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer And Data Communications (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)
  • Small-Scale Networks (AREA)
  • Multi Processors (AREA)
  • Bus Control (AREA)
JP56095248A 1981-06-22 1981-06-22 Controller for shared input and output loop bus of multicomputer system Granted JPS57211628A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56095248A JPS57211628A (en) 1981-06-22 1981-06-22 Controller for shared input and output loop bus of multicomputer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56095248A JPS57211628A (en) 1981-06-22 1981-06-22 Controller for shared input and output loop bus of multicomputer system

Publications (2)

Publication Number Publication Date
JPS57211628A true JPS57211628A (en) 1982-12-25
JPS614135B2 JPS614135B2 (enExample) 1986-02-07

Family

ID=14132447

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56095248A Granted JPS57211628A (en) 1981-06-22 1981-06-22 Controller for shared input and output loop bus of multicomputer system

Country Status (1)

Country Link
JP (1) JPS57211628A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033761A (ja) * 1983-08-04 1985-02-21 Amada Co Ltd ロ−カルネットワ−クシステムのオペレ−ティングシステム
WO1992005490A1 (fr) * 1990-09-18 1992-04-02 Fujitsu Limited Procede de commande exclusive pour memoire partagee
WO1992005489A1 (fr) * 1990-09-18 1992-04-02 Fujitsu Limited Procede d'acces non synchrone a une memoire partagee
US6108755A (en) * 1990-09-18 2000-08-22 Fujitsu Limited Asynchronous access system to a shared storage

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6033761A (ja) * 1983-08-04 1985-02-21 Amada Co Ltd ロ−カルネットワ−クシステムのオペレ−ティングシステム
WO1992005490A1 (fr) * 1990-09-18 1992-04-02 Fujitsu Limited Procede de commande exclusive pour memoire partagee
WO1992005489A1 (fr) * 1990-09-18 1992-04-02 Fujitsu Limited Procede d'acces non synchrone a une memoire partagee
US5377324A (en) * 1990-09-18 1994-12-27 Fujitsu Limited Exclusive shared storage control system in computer system
US6108755A (en) * 1990-09-18 2000-08-22 Fujitsu Limited Asynchronous access system to a shared storage

Also Published As

Publication number Publication date
JPS614135B2 (enExample) 1986-02-07

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