JPS57207344A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57207344A
JPS57207344A JP9245681A JP9245681A JPS57207344A JP S57207344 A JPS57207344 A JP S57207344A JP 9245681 A JP9245681 A JP 9245681A JP 9245681 A JP9245681 A JP 9245681A JP S57207344 A JPS57207344 A JP S57207344A
Authority
JP
Japan
Prior art keywords
substrate
defects
4mum
approx
defect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9245681A
Other languages
Japanese (ja)
Inventor
Toshihiko Fukuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9245681A priority Critical patent/JPS57207344A/en
Publication of JPS57207344A publication Critical patent/JPS57207344A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Semiconductor Memories (AREA)
  • Element Separation (AREA)

Abstract

PURPOSE:To provide a number of crystal defects to contrive non-defects on the surface, by piling up oxidation resistant material on the back of a substrate for patterning with heat treatment to oxidize the back. CONSTITUTION:A square Si3N4 film 4 with film thickness of approx. 3,000Angstrom and side of 4mum is provided on the back 2 of the Si substrate 1 with Miller indices of[100]in the intervals of approx. 4mum for arbitrary patterns. When the entire surfacess of the back and front are oxidized in O2, many crystal defects 5 are generated on the periphery of the pattern 4 by the strain due to heat treatment. The defect 5 extends to the center of the substrate 1 to getter the defect on the surface 3 for non-defects. Thus, the leakage current in pn junction is reduced to attain the improvement of the device reliability and yield.
JP9245681A 1981-06-16 1981-06-16 Manufacture of semiconductor device Pending JPS57207344A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9245681A JPS57207344A (en) 1981-06-16 1981-06-16 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9245681A JPS57207344A (en) 1981-06-16 1981-06-16 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57207344A true JPS57207344A (en) 1982-12-20

Family

ID=14054881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9245681A Pending JPS57207344A (en) 1981-06-16 1981-06-16 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57207344A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH077007A (en) * 1993-06-18 1995-01-10 Rohm Co Ltd Manufacture of substrate for semiconductor device
RU2680607C1 (en) * 2018-01-23 2019-02-25 Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) Method for making semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH077007A (en) * 1993-06-18 1995-01-10 Rohm Co Ltd Manufacture of substrate for semiconductor device
RU2680607C1 (en) * 2018-01-23 2019-02-25 Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) Method for making semiconductor device

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