JPS57102046A - Selective oxidation - Google Patents

Selective oxidation

Info

Publication number
JPS57102046A
JPS57102046A JP55179443A JP17944380A JPS57102046A JP S57102046 A JPS57102046 A JP S57102046A JP 55179443 A JP55179443 A JP 55179443A JP 17944380 A JP17944380 A JP 17944380A JP S57102046 A JPS57102046 A JP S57102046A
Authority
JP
Japan
Prior art keywords
film
polycrystalline silicon
pattern
silicon nitride
silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55179443A
Other languages
Japanese (ja)
Other versions
JPS6338863B2 (en
Inventor
Takeshi Ishihara
Keiichi Kagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP55179443A priority Critical patent/JPS57102046A/en
Publication of JPS57102046A publication Critical patent/JPS57102046A/en
Priority to US06/466,142 priority patent/US4465705A/en
Publication of JPS6338863B2 publication Critical patent/JPS6338863B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/32—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers using masks
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Local Oxidation Of Silicon (AREA)
  • Element Separation (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To form selectively oxide films faithful to a nitride pattern by a method wherein after a silicon nitride film is formed on a polycrystalline silicon film and a pattern for selective oxidation is formed, a thin polycrystalline silicon film is formed thereon and is oxidized. CONSTITUTION:A field oxide film 21 and a gate oxide film 22 are formed on a silicon substrate 1. The polycrystalline silicon film 13 and the silicon nitride film 4 are piled up thereon. A resist pattern having the gate part 51, the wiring part 52 is formed, and the silicon nitride film 4 is etched to transcribe the resist pattern into a silicon nitride pattern using the resist pattern as the mask. Then the second polycrystalline silicon film 6 is piled up on the whole surface thereof, and the whole is heat treated in an oxidizing atmosphere to oxidize the polycrystalline silicon film entirely. The nitride film is made to be exposed, and the silicon nitride film is etched with hot phosphoric acid to perform selective oxidation.
JP55179443A 1980-05-19 1980-12-17 Selective oxidation Granted JPS57102046A (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP55179443A JPS57102046A (en) 1980-12-17 1980-12-17 Selective oxidation
US06/466,142 US4465705A (en) 1980-05-19 1983-02-14 Method of making semiconductor devices

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55179443A JPS57102046A (en) 1980-12-17 1980-12-17 Selective oxidation

Publications (2)

Publication Number Publication Date
JPS57102046A true JPS57102046A (en) 1982-06-24
JPS6338863B2 JPS6338863B2 (en) 1988-08-02

Family

ID=16065946

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55179443A Granted JPS57102046A (en) 1980-05-19 1980-12-17 Selective oxidation

Country Status (1)

Country Link
JP (1) JPS57102046A (en)

Also Published As

Publication number Publication date
JPS6338863B2 (en) 1988-08-02

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