JPS57202784A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS57202784A
JPS57202784A JP8686981A JP8686981A JPS57202784A JP S57202784 A JPS57202784 A JP S57202784A JP 8686981 A JP8686981 A JP 8686981A JP 8686981 A JP8686981 A JP 8686981A JP S57202784 A JPS57202784 A JP S57202784A
Authority
JP
Japan
Prior art keywords
barrier
type
voltage
layer
current
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8686981A
Other languages
Japanese (ja)
Other versions
JPH031827B2 (en
Inventor
Eiji Murata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP8686981A priority Critical patent/JPS57202784A/en
Publication of JPS57202784A publication Critical patent/JPS57202784A/en
Publication of JPH031827B2 publication Critical patent/JPH031827B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/80—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain the device with an excellent surge-resisting property for both forward and inverse currents by a method wherein, when the minimum forward breakdown current of a barrier is indicated by IF1, a VF1>VF2 relation is provided between the voltage VF1 to be applied to the barrier required to run the current IF1 and the voltage to be applied to a protective diode VF2 required to run a current IF1. CONSTITUTION:A high specific resistance buffer layer 3 and an N type active layer 4, to be turned to a channel, are laminated for growth on a semiconductive GaAs substrate 2, and a dual gate FET1 is formed by providing a source electrode 5 to be ohmic contacted, a drain electrode 6, and the first and the second electrodes 7 and 8, whereon a Schottky barrier will be formed. Also, an N<-> type layer 11 is grown on an N<+> type Si substrate 10, a P<+> type region 12 is provided in the layer 11, an electrode 13 is installed on the region 12, and a Zener diode 9 is formed. Then, when a barrier with a protective diode is formed by assembling the above devices, the magnitude of the voltage to be applied to these devices is to be in specific relations between them.
JP8686981A 1981-06-08 1981-06-08 Semiconductor device Granted JPS57202784A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8686981A JPS57202784A (en) 1981-06-08 1981-06-08 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8686981A JPS57202784A (en) 1981-06-08 1981-06-08 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS57202784A true JPS57202784A (en) 1982-12-11
JPH031827B2 JPH031827B2 (en) 1991-01-11

Family

ID=13898820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8686981A Granted JPS57202784A (en) 1981-06-08 1981-06-08 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS57202784A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5220194A (en) * 1989-11-27 1993-06-15 Motorola, Inc. Tunable capacitor with RF-DC isolation

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5348487A (en) * 1976-10-14 1978-05-01 Fujitsu Ltd Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5348487A (en) * 1976-10-14 1978-05-01 Fujitsu Ltd Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5220194A (en) * 1989-11-27 1993-06-15 Motorola, Inc. Tunable capacitor with RF-DC isolation

Also Published As

Publication number Publication date
JPH031827B2 (en) 1991-01-11

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