JPS57197636A - Chattering preventing circuit - Google Patents

Chattering preventing circuit

Info

Publication number
JPS57197636A
JPS57197636A JP56082378A JP8237881A JPS57197636A JP S57197636 A JPS57197636 A JP S57197636A JP 56082378 A JP56082378 A JP 56082378A JP 8237881 A JP8237881 A JP 8237881A JP S57197636 A JPS57197636 A JP S57197636A
Authority
JP
Japan
Prior art keywords
output
chattering
contact point
flop
flip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56082378A
Other languages
Japanese (ja)
Inventor
Hiroshi Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56082378A priority Critical patent/JPS57197636A/en
Publication of JPS57197636A publication Critical patent/JPS57197636A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M11/00—Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
    • H03M11/02—Details

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

PURPOSE:To prevent chattering with simple constitution by delaying a latch signal for setting an encoded output of an input signal from a key contact point to a flip-flop for a longer time than the chattering period of the key contact point. CONSTITUTION:To an encoder 1, contact point information (a) of information S0-Sn from a key contact point S is inputted, and its output (b) encoded in plural bits is applied to a flip-flop 6. To a gate circuit 3, an OR signal of the S0-Sn and the output from a clock generating circuit 2 are applied. The output (d) from the gate circuit 3 triggers a monostable multivibrator 4 and with the rise of its output (e) a multivibrator 5 sends a latch signal (f) that is delayed for the time longer than the chattering period to the flip-flop 6. With this process, a buffer gate 7 is capable of receiving information that is not affected by chattering.
JP56082378A 1981-05-29 1981-05-29 Chattering preventing circuit Pending JPS57197636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56082378A JPS57197636A (en) 1981-05-29 1981-05-29 Chattering preventing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56082378A JPS57197636A (en) 1981-05-29 1981-05-29 Chattering preventing circuit

Publications (1)

Publication Number Publication Date
JPS57197636A true JPS57197636A (en) 1982-12-03

Family

ID=13772916

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56082378A Pending JPS57197636A (en) 1981-05-29 1981-05-29 Chattering preventing circuit

Country Status (1)

Country Link
JP (1) JPS57197636A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5419306A (en) * 1977-07-14 1979-02-14 Nippon Telegr & Teleph Corp <Ntt> Switch circuit for push button dial telephone set

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5419306A (en) * 1977-07-14 1979-02-14 Nippon Telegr & Teleph Corp <Ntt> Switch circuit for push button dial telephone set

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