JPS56128017A - Chattering preventing circuit - Google Patents

Chattering preventing circuit

Info

Publication number
JPS56128017A
JPS56128017A JP3198280A JP3198280A JPS56128017A JP S56128017 A JPS56128017 A JP S56128017A JP 3198280 A JP3198280 A JP 3198280A JP 3198280 A JP3198280 A JP 3198280A JP S56128017 A JPS56128017 A JP S56128017A
Authority
JP
Japan
Prior art keywords
output
latch
clock
becomes
switch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3198280A
Other languages
Japanese (ja)
Inventor
Toshio Orii
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP3198280A priority Critical patent/JPS56128017A/en
Publication of JPS56128017A publication Critical patent/JPS56128017A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/125—Discriminating pulses
    • H03K5/1252—Suppression or limitation of noise or interference

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Electronic Switches (AREA)

Abstract

PURPOSE:To prevent a chattering noise by outputting a keying signal from the mechanical switch which is an input means, after delaying it by a prescribed time. CONSTITUTION:When the switch 1 has been closed, the potential of the point C contains chattering and rises, and becomes an input signal of the latch 109. The output of the latch 109 is provided to the differentiating circuit 108, this pulse output becomes a clock of the latches 107, 106, and the latches 107, 106 store the outputs (a), (b) of the frequency dividers 102, 103. On the other hand, the output of the AND circuit 119 to which the outputs of the frequency dividers 110, 121 are provided becomes a clock of the latch 113, and the output is generated to the terminal l. According to this constitution, the maximum error after the switch 4 has been closed is 1/2 period of the clock, and it can be made very small.
JP3198280A 1980-03-13 1980-03-13 Chattering preventing circuit Pending JPS56128017A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3198280A JPS56128017A (en) 1980-03-13 1980-03-13 Chattering preventing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3198280A JPS56128017A (en) 1980-03-13 1980-03-13 Chattering preventing circuit

Publications (1)

Publication Number Publication Date
JPS56128017A true JPS56128017A (en) 1981-10-07

Family

ID=12346135

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3198280A Pending JPS56128017A (en) 1980-03-13 1980-03-13 Chattering preventing circuit

Country Status (1)

Country Link
JP (1) JPS56128017A (en)

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