JPS57181138A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57181138A
JPS57181138A JP6521781A JP6521781A JPS57181138A JP S57181138 A JPS57181138 A JP S57181138A JP 6521781 A JP6521781 A JP 6521781A JP 6521781 A JP6521781 A JP 6521781A JP S57181138 A JPS57181138 A JP S57181138A
Authority
JP
Japan
Prior art keywords
boundary
sos
single crystal
silicon layer
sapphire substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6521781A
Other languages
Japanese (ja)
Inventor
Koichi Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP6521781A priority Critical patent/JPS57181138A/en
Publication of JPS57181138A publication Critical patent/JPS57181138A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • H01L21/86Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS

Abstract

PURPOSE:To decrease boundary region defects and improve electrical characteristics of an SOS element, by irradiating a laser beam on the back surface of a sapphire substrate after epitaxial growth of a single crystal Si layer, and annealing near the boundary with laser. CONSTITUTION:A laser beam 50 is irradiated on the back surface 40 of a sapphire substrate 10 after epitaxial growth of a single crystal silicon layer 20 on the sapphire substrate 10. A boundary 30 near the sapphire substeate 10 and single crystal silicon layer 20 is annealed with laser. Afterwards, an SOS element is formed by, for instance, mesaetching and by forming an oxide film 70, a gate 60, a source 80 and a drain 90. This decreases defects in the boundary 30 under the silicon layer 20 and improves the electrical characteristics of SOS element.
JP6521781A 1981-05-01 1981-05-01 Manufacture of semiconductor device Pending JPS57181138A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6521781A JPS57181138A (en) 1981-05-01 1981-05-01 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6521781A JPS57181138A (en) 1981-05-01 1981-05-01 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57181138A true JPS57181138A (en) 1982-11-08

Family

ID=13280518

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6521781A Pending JPS57181138A (en) 1981-05-01 1981-05-01 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57181138A (en)

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