JPS5718095A - Test method for storage integrated circuit - Google Patents

Test method for storage integrated circuit

Info

Publication number
JPS5718095A
JPS5718095A JP9168180A JP9168180A JPS5718095A JP S5718095 A JPS5718095 A JP S5718095A JP 9168180 A JP9168180 A JP 9168180A JP 9168180 A JP9168180 A JP 9168180A JP S5718095 A JPS5718095 A JP S5718095A
Authority
JP
Japan
Prior art keywords
data
level
amplifier
inputted
sense amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9168180A
Other languages
English (en)
Other versions
JPS6034200B2 (ja
Inventor
Takeshi Mizusawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP55091681A priority Critical patent/JPS6034200B2/ja
Publication of JPS5718095A publication Critical patent/JPS5718095A/ja
Publication of JPS6034200B2 publication Critical patent/JPS6034200B2/ja
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing

Landscapes

  • Test And Diagnosis Of Digital Computers (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
JP55091681A 1980-07-07 1980-07-07 記憶集積回路の試験方法 Expired JPS6034200B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55091681A JPS6034200B2 (ja) 1980-07-07 1980-07-07 記憶集積回路の試験方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55091681A JPS6034200B2 (ja) 1980-07-07 1980-07-07 記憶集積回路の試験方法

Publications (2)

Publication Number Publication Date
JPS5718095A true JPS5718095A (en) 1982-01-29
JPS6034200B2 JPS6034200B2 (ja) 1985-08-07

Family

ID=14033229

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55091681A Expired JPS6034200B2 (ja) 1980-07-07 1980-07-07 記憶集積回路の試験方法

Country Status (1)

Country Link
JP (1) JPS6034200B2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0249933A (ja) * 1988-08-09 1990-02-20 Hitachi Ltd ガスタービン燃焼器状態監視装置及び監視方法及び制御方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0249933A (ja) * 1988-08-09 1990-02-20 Hitachi Ltd ガスタービン燃焼器状態監視装置及び監視方法及び制御方法

Also Published As

Publication number Publication date
JPS6034200B2 (ja) 1985-08-07

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