JPS57177520A - Manufacture of compound semiconductor device - Google Patents
Manufacture of compound semiconductor deviceInfo
- Publication number
- JPS57177520A JPS57177520A JP6236381A JP6236381A JPS57177520A JP S57177520 A JPS57177520 A JP S57177520A JP 6236381 A JP6236381 A JP 6236381A JP 6236381 A JP6236381 A JP 6236381A JP S57177520 A JPS57177520 A JP S57177520A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- diffusion
- mask
- impurities
- gaas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title abstract 3
- 150000001875 compounds Chemical class 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000009792 diffusion process Methods 0.000 abstract 7
- 239000012535 impurity Substances 0.000 abstract 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract 4
- 230000002159 abnormal effect Effects 0.000 abstract 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 abstract 2
- 230000015572 biosynthetic process Effects 0.000 abstract 2
- 229910052681 coesite Inorganic materials 0.000 abstract 2
- 229910052906 cristobalite Inorganic materials 0.000 abstract 2
- 239000000377 silicon dioxide Substances 0.000 abstract 2
- 235000012239 silicon dioxide Nutrition 0.000 abstract 2
- 229910052682 stishovite Inorganic materials 0.000 abstract 2
- 229910052905 tridymite Inorganic materials 0.000 abstract 2
- 238000005229 chemical vapour deposition Methods 0.000 abstract 1
- 230000002349 favourable effect Effects 0.000 abstract 1
- 238000010438 heat treatment Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 abstract 1
- 238000003825 pressing Methods 0.000 abstract 1
- 239000012808 vapor phase Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Junction Field-Effect Transistors (AREA)
Abstract
PURPOSE:To suppress abnormal diffusion of impurities in the lateral direction and to control precisely an impurity layer when the impurities are to be introduced selectively in a compound semiconductor by a method wherein the semiconductor is treated at the temperature or more of formation of an insulating film for mask. CONSTITUTION:An N type layer 2 doped with S is made to grow vapor phase epitaxially on an N<+> type GaAS layer 1 doped with Si in high concentration, an SiO2 layer is pilled up thereon according to the CVD method, and an opening is formed selectively to form the mask 3. Then it is heat-treated at the SiO2 formation temperature or more in H2 gas. After then, when thermal diffusion of Zn is performed preventing discomposition of GaAs by applying pressure of As, the distance of abnormal diffusion of a diffusion layer 34 in the lateral direction is shortened to approach the pattern of the diffusion mask. When the mask layer 3 is pilled up, a thermal metamorphic layer is formed on the surface of the GaAs layer to generate abnormal diffusion of impurities along the metamorphic layer, but the composition is changed by the heat treatment according to this constitution, and abnormal diffusion is suppressed. Accordingly the impurity layer can be formed precisely and having favorable reproducibility.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6236381A JPS57177520A (en) | 1981-04-27 | 1981-04-27 | Manufacture of compound semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6236381A JPS57177520A (en) | 1981-04-27 | 1981-04-27 | Manufacture of compound semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS57177520A true JPS57177520A (en) | 1982-11-01 |
Family
ID=13197957
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6236381A Pending JPS57177520A (en) | 1981-04-27 | 1981-04-27 | Manufacture of compound semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS57177520A (en) |
-
1981
- 1981-04-27 JP JP6236381A patent/JPS57177520A/en active Pending
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