JPS60160119A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS60160119A
JPS60160119A JP1805584A JP1805584A JPS60160119A JP S60160119 A JPS60160119 A JP S60160119A JP 1805584 A JP1805584 A JP 1805584A JP 1805584 A JP1805584 A JP 1805584A JP S60160119 A JPS60160119 A JP S60160119A
Authority
JP
Japan
Prior art keywords
oxide film
diffusion
thickness
approximately
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1805584A
Other languages
Japanese (ja)
Inventor
Yoshiyuki Matsui
良行 松井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP1805584A priority Critical patent/JPS60160119A/en
Publication of JPS60160119A publication Critical patent/JPS60160119A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2252Diffusion into or out of group IV semiconductors using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To obtain a desired oxide film and an excellent diffusion layer of desired depth by a method wherein the greater part of a desired oxide film is grown in a short period by performing a wet oxidation, and then a diffusion is advanced by performing a dry thermal oxidation. CONSTITUTION:After B has been deposited on an N-layer 2 from the window of an oxide film 3, a P-layer 4 of approximately 3mum in thickness is formed by performing a wet oxidation at 1,150 deg.C for 30min, and an oxide film of approximately 8,500Angstrom in thickness is covered thereon. Temperature is raised to 1,230 deg.C under the above-mentioned condition, and when the above is oxidized for approximately 10hr using dry O2, the P-layer 4 is diffused to the depth of 17mum, an oxide film of approximately 1,400Angstrom is newly grown on the film5, and this oxide film can be used satisfactorily as a diffusion mask in the process to be performed subsequently. According to this constitution, an oxide film and a diffusion layer of desired thickness can be obtained, and moreover, a heat treatment can be finished within 10hr, thereby enabling to reduce the generation of crystal defects remarkably.

Description

【発明の詳細な説明】 この発明は半導体装置の製造方法特に不純物拡散法に関
する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to an impurity diffusion method.

周知のよりに半導体装−の製造過程において拡散熱31
i愼繰返して行なわれる。拡散とは半導体中に不純物原
子を導入して任意の伝導形と不純物プロファイルを有し
た層を形成することであるが、実際に半導体装置を製造
するには選択拡散flE +%要であり、その★めに拡
散にさきだってH面に酸化膜を生成させ、フォトエッチ
ングエ穆を経た処理を行なり。通常は最初の拡散を除す
てけ、多(の場合、前回の拡散工程の後半で生成させた
酸化膜をそのままマスクとし使用する。したがって拡散
のための加熱は又酸化膜の生成のための加熱でもある。
As is well known, diffusion heat31 occurs in the manufacturing process of semiconductor devices.
This is done repeatedly. Diffusion is the process of introducing impurity atoms into a semiconductor to form a layer with an arbitrary conductivity type and impurity profile, but in order to actually manufacture semiconductor devices, selective diffusion flE +% is required. *Prior to diffusion, an oxide film is generated on the H-plane, and a photo-etching process is performed. Usually, the initial diffusion is removed and the oxide film formed in the latter half of the previous diffusion process is used as a mask. There is also.

一方この種の拡散処理に際しての拡散深さは、加熱温廖
と加熱時間とに関連する6たとえば14〜17μ程廖の
深さに拡散しよりとするためには、1208℃、72時
間を必要とする。このような高温下におりて長時間にわ
たって処理されると、ウェファの表面のみならずその内
部にまで結晶欠陥が生じやすい。又このよりに1200
℃ 以上の高温下で拡散するとき一般にVライ0露 に
よる熱拡散法が適用されるが、この場合の酸化膜の生成
速Jtはウェットによる熱酸化法(ウェットO意酸化及
びスチーム酸化を含む)忙比較して逼る一A、に遅す、
そのため虻も前記した拡散のための加熱時間も長(必要
となるのである。
On the other hand, the diffusion depth in this type of diffusion treatment is related to the heating temperature and heating time.For example, in order to achieve a deep diffusion of about 14 to 17 μm, 72 hours at 1208°C is required. shall be. When processed at such high temperatures for a long period of time, crystal defects are likely to occur not only on the surface of the wafer but also inside the wafer. 1200 more than this
When diffusing at a high temperature of ℃ or higher, the thermal diffusion method using V ryo 0 dew is generally applied, but the oxide film formation rate Jt in this case is the same as the wet thermal oxidation method (including wet O oxidation and steam oxidation). I'm busy and I'm late for A.
Therefore, the heating time required for the above-mentioned diffusion is also long.

この発明は拡散時間を短縮することによって結晶欠陥の
発生を防止するとともに、所望の拡散深さと、酸化膜厚
が得られるよりにすることを目的とする。
The object of this invention is to prevent the occurrence of crystal defects by shortening the diffusion time, and to make it easier to obtain a desired diffusion depth and oxide film thickness.

この発明け2段拡散を行うに際して1段目の拡散は高濃
廖の不純物を短時間拡散させ一雀つウェットによる熱酸
化によって、必要な厚みの酸化膜を生成し、2段目の拡
散は1段目の拡散に引き続−て高温状部にしてさきの拡
散層を所望の深さまで形成させるとともに前記酸化膜の
表面KFにドライO8による酸化膜を生成することを特
徴とする。
When carrying out two-stage diffusion using this invention, the first stage diffuses highly concentrated impurities for a short time and generates an oxide film of the required thickness through thermal oxidation in a single wet state, and the second stage diffuses The method is characterized in that, following the first stage diffusion, a previous diffusion layer is formed in a high temperature region to a desired depth, and an oxide film is formed by dry O8 on the surface KF of the oxide film.

1段目の拡散の際にウェットによる熱酸化法によって酸
化膜を生成するので、短時間で所望の厚みの酸化膜が得
られる。たとえば6800〜7800Aの厚みの酸化膜
を得るのには、900〜1200℃で約80分の加熱で
十分である。なおこのときの不純物の拡散深さは約8μ
である。又不純物を高濃廖としてか(。通常は拡散層の
表面a廖は1OIs〜1(’1”/d程麿であるから、
これよりも高濃廖とすればよい。この拡散工程にお層て
ウェットによる熱酸化法を用する。
Since an oxide film is generated by a wet thermal oxidation method during the first stage diffusion, an oxide film with a desired thickness can be obtained in a short time. For example, heating at 900 to 1200° C. for about 80 minutes is sufficient to obtain an oxide film with a thickness of 6800 to 7800 Å. The impurity diffusion depth at this time is approximately 8μ.
It is. Also, if the impurity is highly concentrated (.Usually, the surface thickness of the diffusion layer is about 1OIs~1('1''/d),
It would be better to use Gao Nong Liao instead. A wet thermal oxidation method is used in this diffusion step.

2段目の拡散は、さきに拡散された不純物を内部に送り
こむためのものである。この拡散の深さを14〜17μ
とするのに198+’1.10時間程廖で可能となる。
The second stage of diffusion is for sending the previously diffused impurities into the interior. The depth of this diffusion is 14-17μ
This can be done in about 198+'1.10 hours.

したがって従来法に比較すれば高温処理時間は逼るかに
短(てすむことになる。これにより表面及び内部の結晶
欠陥は十分減少する。
Therefore, compared to the conventional method, the high temperature treatment time is much shorter. As a result, surface and internal crystal defects are sufficiently reduced.

又製造に要する時間も短か(なる。2段目の工程ではド
ライ08による熱酸化法を用IAる。そのためこの工程
中でも酸化膜が生成される。このとき生成される酸化膜
の厚みは約1μ程崖である。これによってさきの酸化膜
と合わせて次の拡散工程に必要な厚みとなる。したがっ
て次の拡散工程時における当該拡散領域への不必要な不
純物の侵入が充分に防止できる。
In addition, the time required for manufacturing is also short.The second step uses a thermal oxidation method using dry 08.Therefore, an oxide film is formed even during this step.The thickness of the oxide film formed at this time is approximately The thickness is approximately 1 μm.This, together with the previous oxide film, provides the thickness necessary for the next diffusion process.Therefore, unnecessary impurities can be sufficiently prevented from entering the diffusion region during the next diffusion process.

以上によって所望の厚みの酸化膜と゛、所望の深さの拡
散層が得られるよりになる。そして従来のよりIC72
時間とbつた長時間にわたって高温にさらされることが
なりので1表面のみならず内部での結晶欠陥の発生は著
るしく減少する。なお2段目の拡散の際に、N、ガスの
みを流したとき及び08ガスのみを流したときに比較し
、最初にN。
Through the above steps, an oxide film of desired thickness and a diffusion layer of desired depth can be obtained. And IC72 than the conventional one
Since it is exposed to high temperatures for a long period of time, the occurrence of crystal defects not only on one surface but also in the interior is significantly reduced. In addition, during the second stage of diffusion, we compared the results when only N gas was flowed and when only 08 gas was flowed.

(4//m)とOB (1n OCC/ m’)のMカ
Xヲfi合して流し、その途中でO露ガスのみを流すよ
りにしたところ1表面の結晶欠陥を更に著るしく減少す
ることが確められている。
(4//m) and OB (1n OCC/m') were combined and flowed together, and in the middle of the flow only O dew gas was flowed, and the crystal defects on the 1 surface were further significantly reduced. It is confirmed that it will.

次にこの発明の実施例を1によって詩明する。Next, embodiment 1 of this invention will be described.

図はN型基板に形成されたN型のエピタキシャル層にP
型の伝導域を拡散によって形成する場合を示し、第1図
にi?Lnて半導体基板(たとえばN型)1の表面にN
型の伝導域2がエビタキシャV成長によってすでに形成
されて粘るものとし、8は熱酸化法によって生成された
酸化膜とする。この伝導域2にP型の伝導域を生成する
のであるが、P型の伝導域の生成のために、その生成領
域の表面から酸化$illを第1図のよりに部分的にフ
ォトエツチングによって除去する。
The figure shows an N-type epitaxial layer formed on an N-type substrate.
The case where the conduction region of the mold is formed by diffusion is shown in FIG. Ln on the surface of the semiconductor substrate (for example, N type) 1
It is assumed that the conduction region 2 of the mold has already been formed by epitaxial V growth and is sticky, and 8 is an oxide film produced by a thermal oxidation method. A P-type conduction region is generated in this conduction region 2. In order to generate the P-type conduction region, $ill oxide is partially photoetched from the surface of the generation region as shown in Figure 1. Remove.

つぎにこの発明にした値;つて不純物たとえばボロンを
デボディジョンし、ここで1150℃ウェットで804
+加熱する。これKよって第8図に示すようにボロンに
よるP型の伝導域4が薄くたとえば約8μの厚み挺拡散
生成される。同時に表面に新たに酸化膜5値I形成され
る。この膜厚けたとえば6500A程膚である。次にそ
のまま炉内の温廖をたとえば1280℃まで高め、約1
0時間ドライ0爺による熱酸化を行なり。この結果第8
図に示すよらに前記伝導域4は約17μの深さまで拡散
が進行した。同時に酸化$5の表面にも新たに酸化膜が
生成される。この膜厚は約580OAであり一したがっ
て両酸化膜5の厚膜は約14.00OAとなる。この程
賓の膜厚の酸化膜によれば次の拡散工程に必要なマスク
として十分使用できる。
Next, the value determined in this invention is obtained by debodimenting impurities such as boron, and then drying at 1150℃ wet to 804℃.
+Heat. As a result, as shown in FIG. 8, a P-type conduction region 4 made of boron is formed through diffusion to a thin thickness of, for example, about 8 μm. At the same time, a new 5-level oxide film I is formed on the surface. The thickness of this film is, for example, about 6500A. Next, the temperature inside the furnace is increased to, for example, 1280℃, and about 1
Thermal oxidation was performed by drying for 0 hours. As a result, the 8th
As shown in the figure, diffusion progressed in the conduction region 4 to a depth of approximately 17 μm. At the same time, a new oxide film is generated on the surface of the oxidized $5. This film thickness is about 580 OA, so the thickness of both oxide films 5 is about 14.00 OA. An oxide film of this thickness can be used sufficiently as a mask necessary for the next diffusion step.

以上詳述したよらkこの発明によれば、2段拡散を行り
に際し、1段目の拡散でウェットによる熱酸化によって
短時間で必要な酸化膜のほとんどを生成し、そのあとド
ライ08による熱酸化によって不純物を内部に送りこん
で拡散を進行させるより和したので、得ようとする厚み
の酸化膜と、所望の深さの拡散層が得られ、しか屯高温
下で長時間にわたって処理することがなりので、結晶欠
陥の発生を著るしく低減させることができるといった効
果を奏する。
As detailed above, according to this invention, when performing two-stage diffusion, most of the necessary oxide film is generated in a short time by wet thermal oxidation in the first stage diffusion, and then heated by dry 08. Since oxidation is more effective than introducing impurities into the interior and promoting diffusion, it is possible to obtain an oxide film of the desired thickness and a diffusion layer of the desired depth, and it is also possible to process at high temperatures for a long time. Therefore, it is possible to significantly reduce the occurrence of crystal defects.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第8図はこの発明による製造工程を示す断面
図である。
1 to 8 are cross-sectional views showing the manufacturing process according to the present invention.

Claims (1)

【特許請求の範囲】[Claims] 高濃廖の不純物をウェットによる熱酸化によって短時間
加熱して、所望厚の酸化膜を生成するとと4.に:1I
IT&!不純物を浅く拡散せしめ、つぎKそのまま高温
状部にしてドライO会による熱酸化によって長時間加熱
して、前記不純物を内部へ送りこむことによって所望の
深さまで拡散せしめてなる半導体装着の製造方法。
4. Highly concentrated impurities are heated for a short time by wet thermal oxidation to form an oxide film of a desired thickness. Ni:1I
IT&! A manufacturing method for semiconductor mounting, in which impurities are diffused shallowly, and then the impurities are heated for a long time by thermal oxidation using a dry O group in a high-temperature state, and the impurities are diffused to a desired depth by sending the impurities inside.
JP1805584A 1984-01-30 1984-01-30 Manufacture of semiconductor device Pending JPS60160119A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1805584A JPS60160119A (en) 1984-01-30 1984-01-30 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1805584A JPS60160119A (en) 1984-01-30 1984-01-30 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS60160119A true JPS60160119A (en) 1985-08-21

Family

ID=11961009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1805584A Pending JPS60160119A (en) 1984-01-30 1984-01-30 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS60160119A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6032441A (en) * 1997-11-13 2000-03-07 The Toro Company Triplex trim mower with laterally adjustable cutting units

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295975A (en) * 1976-02-09 1977-08-12 Hitachi Ltd Prevention of leak of impurity in manufacturing semiconductor unit
JPS52129276A (en) * 1976-04-21 1977-10-29 Fujitsu Ltd Production of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5295975A (en) * 1976-02-09 1977-08-12 Hitachi Ltd Prevention of leak of impurity in manufacturing semiconductor unit
JPS52129276A (en) * 1976-04-21 1977-10-29 Fujitsu Ltd Production of semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6032441A (en) * 1997-11-13 2000-03-07 The Toro Company Triplex trim mower with laterally adjustable cutting units
US6351929B1 (en) 1997-11-13 2002-03-05 The Toro Company Triplex trim mower with laterally adjustable cutting units

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