JPS60193330A - Method for diffusing impurities into semiconductor - Google Patents

Abstract

PURPOSE:To provide a remarkably large and lateral diffused-region on a substrate surface under a thick insulating film, by forming a impurity diffused region on the surface layer of a semiconductor substrate, through a polycrystalline alloy layer having a rapid impurity diffusing rate. CONSTITUTION:After an SiO2 film 101 is coated on a P type Si substrate 100, an opening is bored and an Mo film 102 is deposited on the entire face. Next, Si ions are implanted to form a mixing layer of Mo and Si. The substrate is then heat-treated to produce silicide reaction only in the opening and to leave the Mo film 102 on the film 101 with a non-reacted state. After the non-reacted Mo film 102 is removed using H2O2 etching liquid, the film 101 is removed with HF aqueous solution and an Mo silicide layer 103 is formed on the substrate 100 surface. Thereafter, the entire surface is coated with an SiO2 film 104 which is then heat-treated to make dense and through which an opening is bored with being positioned at the central surface portion of the layer 103. Next, after an SiO2 film 106 is coated on the entire face including the exposed face 105 of the layer 103, an N type diffused region 107 being expanded laterally under the layer 103 can be provided owing to being diffused in POCl3 contained gas.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for diffusing impurities into a semiconductor used in the field of manufacturing semiconductor devices.

(Prior Art and its Problems) There are two methods for doping impurities into semiconductors that have been widely used in the past: thermal diffusion and ion implantation. The former forms a diffusion mask on the semiconductor surface,
After forming an opening in the gold film in the region where impurities are to be diffused, I
The impurity is diffused on the semiconductor surface of the opening by making it in contact with lfl and diffusing the impurity #1. This is a method of forming regions. The latter has a thin protective layer on the surface of the opening! This is a method of forming an impurity diffusion method on the surface of the opening by fully accelerating the impurity and injecting it through the thin film after the entire i-film is formed.

In any of these methods, the formation of the impurity diffusion region is mostly limited to the opening, and the impurity is laterally diffused from the opening, and the lateral diffusion region formed under the diffusion mask is extremely small. This is because the diffusion mechanisms in the vertical and lateral directions are the same in the semiconductor, and the substantial lateral diffusion length is about 1 μm or less. Therefore, it is necessary to provide an opening approximately the same size as the region in which the impurity is to be diffused. Therefore, in the conventional integrated circuit manufacturing method, a diffusion layer is first formed, and then an interlayer insulating film is formed for electrical isolation between the diffusion layer and a wiring layer to be formed overlying the diffusion layer.

For example, in manufacturing a MOS (MOS) transistor, a diffusion layer to be used as a source/drain is formed, and then a glabellar insulating film made of a phosphosilicate glass layer is formed.

However, in high-performance integrated circuits that particularly require high speed and high degree of integration, MOS transistors with delicate structures are used, and the following problems arise due to the above manufacturing procedure. That is, after forming the phosphosilicate glass layer, the glass layer was heated at 1000°C for densification and flattening.
It is necessary to perform a heat treatment at a high temperature for a certain amount of time, and during this heat treatment, impurities in the already formed diffusion layer are diffused, resulting in an increase in the depth of the diffusion layer. This increase in the depth of the diffusion layer is due to the fine MOS
In transistors, it is harmful and the so-called short channel effect is strengthened, but in severe cases,
There is a problem in that the source and drain are connected and it does not become a transistor.

Furthermore, in detailed studies by the present inventor, a high melting point metal silicide, which is useful as a low resistance gate electrode material for micro MO8 integrated circuits, is used as a polycrystalline alloy layer or a polycrystalline conductive material.
It has been found that when diffusion is performed under conditions where the silicide is directly exposed to the diffusion atmosphere using POC and BCl as a diffusion source, a problem arises in that roughness occurs on the surface of the silicide. Usually, in MIS) transistors,
Aluminum for wiring is connected to a part of the surface of the source and drain, but the surface cracks of the silicide are
It has become clear that reliability is adversely affected by poor bonding at one fixed point where silicide and aluminum are connected.

In addition, ion implantation has traditionally been used to form shallow diffusion layers, but it requires high-temperature annealing after ion implantation to recover from damage caused by the implantation, and the problem is that impurities diffuse deeply during this annealing. There is.

(Objective of the invention) Does the present invention solve the above problems? The purpose was to develop a new impurity diffusion method that enables good diffusion of impurities even to the semiconductor surface covered with a thick insulating film such as an interlayer film. It is about providing.

(Structure of the Invention) According to the present invention, there is a step of forming a tetraelectric thin film on a semiconductor substrate or a semiconductive thin film, and alloying the conductive thin film and the semiconductor at a location where the conductive thin film and the semiconductor come into contact. a step of causing a reaction to form a polycrystalline alloy layer; a step of forming an insulating film to cover the polycrystalline alloy layer or a wiring made of a polycrystalline conductive material connected to the polycrystalline alloy layer;
After opening a predetermined region 't of the insulating film to expose a part of the polycrystalline alloy layer or a part of the wiring made of the polycrystalline conductive material, the insulating film having the property of transmitting impurities is exposed. The polycrystalline alloy layer or the wiring made of the polycrystalline 4-electric material under the insulating film and the polycrystalline alloy are formed by forming the polycrystalline alloy layer or the polycrystalline 4-electrode material under the insulating film by forming the polycrystalline alloy layer so as to cover the part and by diffusing impurity sound from the opening. There is obtained a method for diffusing impurities into a semi-integrated body, which comprises the step of diffusing impurities into a semiconductor region in contact with the polycrystalline alloy layer through the layer.

In addition, according to the present invention, there is a step of completely forming a conductive thin film on a semiconductor substrate or a semiconductor thin film, and an alloy of the conductive thin film and the semiconductor at a place where the conductive thin film and the semi-integrated body come into contact with each other. A process of causing a chemical reaction to form a polycrystalline alloy layer, and forming an insulating film entirely so as to cover the wiring made of the polycrystalline 4'i1 material connected to the polycrystalline gold layer or the core polycrystalline alloy layer. After opening a predetermined region of the insulating film to expose a part of the polycrystalline alloy layer or a part of the wiring made of the polycrystalline conductive material, the insulating film doped with impurities is A wiring made of the polycrystalline alloy layer or the polycrystalline conductive material and the polycrystalline alloy are formed by forming at least the exposed surface of the polycrystalline alloy layer or the polycrystalline conductive material, and then performing heat treatment. There is obtained a method for diffusing impurities into a semiconductor, which comprises the step of diffusing impurities into a semiconductor region in contact with the polycrystalline alloy layer.

(Example) Next figure? An example of the method according to the invention will be described using the following.

Figure 1 (a), (b), (r:), (d)
1 is a schematic cross-sectional view of a sample for explaining in detail the invention of claim 1. FIG.

First, as shown in FIG.
1. is formed in part by a normal photolithography process. After forming an opening of the same size as that shown in FIG. 1, a molybdenum group 102 having a thickness of 400 Å is deposited by sputtering. lack,
Inject Si ions at 100 keV to a depth of 5 × 10 cm.
A mixed layer of molybdenum and silicon is entirely formed in the opening. Next, when heat treatment is performed at 550°C for 20 minutes, a silicide reaction occurs only in the openings, and the # silicon film 101
The upper molybdenum film remains unreacted.

Next, after removing this unreacted molybdenum film using a kHz etching solution, the silicon oxide film 101 is removed using an HF aqueous solution, and as shown in FIG. A molybdenum silicide layer 103 of 100X is formed on the surface of the silicon substrate 100 .

Next, a silicon oxide film 104 of about 6000X is entirely formed by vapor phase growth, annealed at 900°C for 20 minutes to make the silicon oxide film dense, and then a film of several μm is formed by a normal photolithography process. An opening of the same size was provided, and an exposed surface 105 was provided on a part of the surface of the molybdenum silicate layer as shown in FIG. 1(e).

Next, after forming a silicon oxide film 106t with a thickness of 100X by vapor phase growth, the silicon oxide film was densified at 900°C, and then heated at 950°C for 30 minutes in a gas atmosphere containing POC2s. By doing all the spreading,
As shown in FIG. 1(d), phosphorus was diffused into the semiconductor through the molybdenum silicide layer 103 throughout the silicon oxide film 106, forming a phosphorus diffusion layer 107 with a depth of o and i μm. The thickness of the silicon oxide film 106 is not limited to tooXK, and may be as thin as several hundred amps. Tsumashirin diffusion layer 1
07 is set to a thickness that does not become too deep.

FIGS. 2(a) and 2(b) are schematic cross-sectional views of a sample for explaining the invention of claim 2 in detail.

After going through the same manufacturing process as in Fig. 1(a) to <e),
A 7c# silicon film 206 doped with phosphorus to a normal degree of doping and having a film thickness of 500X was formed by vapor phase growth to obtain the structure shown in FIG. 2(a). Next, in a nitrogen gas atmosphere,
By performing the heat treatment at 50°C for 30 minutes, the phosphorus contained in the silicon oxide film is diffused through the entire molybdenum silicide 203 to the silicon substrate surface, resulting in shallow phosphorus formation as shown in FIG. 2(b). A diffusion layer 207 was obtained.

Figure 3 (at t <b> t (a) is a diagram for explaining an example in which a wiring made of a polycrystalline conductive material is formed on a polycrystalline alloy layer formed on a semiconductor surface and impurities are diffused from there. FIG. 1 is a schematic cross-sectional view of a sample. FIGS. 1(a) to (e)
After going through the same manufacturing process as above, a polycrystalline molybdenum silicide film with a thickness of 5000× is formed on the entire surface by sputtering method, and then shiba tanning is performed by ordinary water etching method to form molybdenum silicide distribution A306. 'c form, Figure 3 (
The +14 structure of a) was formed. Next, as shown in FIG. 3(b), a silicon oxide film 307 with a thickness of about 600 OA was formed by vapor phase growth, and after annealing at 900° C. for 20 minutes for densification, An opening is made using a normal photolithography process to expose the molybdenum silicide surface 3.
08 was formed. Next, as shown in FIG. 3(c), a silicon oxide film 309 with a thickness of 1000 Å is entirely formed and heated at 900° C. for densification.

After annealing for 20 minutes, phosphorus is diffused into the molybdenum silicide wiring 306 and the molybdenum boride layer 303 by performing diffusion at 950° C. for 30 minutes using poct.
It was diffused throughout to form a diffusion layer 310 on the semiconductor surface.

In all of the above examples, the lateral diffusion length achieved through the molybdenum silicide layer reached 500 μm or more. It has become clear that by doing so, it is possible to completely dope impurities to the semiconductor surface under a thick insulating film, which was previously impossible.

Furthermore, in the above embodiment, molybdenum silicide was used as the wiring made of the polycrystalline alloy layer and the polycrystalline conductive material, but the same applies when tantalum or tungsten silicide or a multilayer film of these is used. The results were confirmed. Furthermore, in the case of titanium silicide, oxidation
The results were similar, except that dry etching was used in the recon film removal step.

Furthermore, other n-type impurities such as As and p-type impurities such as boron were similarly effective.

In addition, in the examples, when forming a molybdenum compound as a polycrystalline alloy layer, a formation procedure is shown in which St ions are implanted onto the molybdenum film, followed by heat treatment. This is a known method for obtaining .

Similar results were obtained when the polycrystalline alloy layer was made of silicide formed simply by heat treatment without St ion implantation.

(Effects of the Invention) In the method according to the present invention, since impurity diffusion to the semiconductor surface is performed through the polycrystalline alloy layer where the impurity diffusion rate is sufficiently high, significantly large lateral diffusion is achieved.
Impurity doping of the semiconductor surface under a thick insulating film was achieved.

Therefore, according to the present invention, the conventional 3M manufacturing procedure for MIS type transistors can be completely reversed. For example, it is possible to perform this through contact holes provided in an interlayer insulating film made of impurity-doped all-phosphorus silicate glass for forming sources and drains. This is extremely important, especially when forming minute MIS type transistors that are essential for high-performance integrated circuits. That is, it has become possible to sufficiently perform high-temperature heat treatment for densification and flattening of phosphosilicate glass, which could not be performed sufficiently in the past due to the increase in the depth of the diffusion layer.

In addition, when a high melting point metal silicide is used as the polycrystalline alloy layer in the present invention, a low electrical resistance layer of several Ω/mm to 20 Ω/mm is formed on the surface of the diffusion layer, which poses a larger problem than the conventional one. The problem of increased resistance in the shallow diffusion layer was also solved at the same time.

In addition, in the present invention, impurity diffusion is performed from an insulating film covering the opening of a wiring made of a polycrystalline gold layer or a polycrystalline conductive material, or an insulating film doped with impurities. Since the alloy layer or the polycrystalline conductive material was not directly exposed to the diffusion atmosphere, no surface wracking occurred on the surface of the M made of the polycrystalline alloy layer or the polycrystalline conductive material.

In addition, in the present invention, since the thermal diffusion method is used, annealing for damage recovery as described in r1i1 is not necessary, and since it is carried out after sufficient high-temperature heat treatment that requires impurity doping, shallow fitting formation is possible. This is advantageous over ion implantation in this respect.

As described above, according to the present invention, a method for forming a highly reliable and low-resistance shallow impurity diffusion layer that can be used as a diffusion layer for the source and drain of a minute MISI transistor or for wiring has been obtained.

[Brief explanation of the drawing]

1 (a) to (d), % 2 (a) * (b
) -$ Figure 3 (B) to (e) are schematic cross-sectional views of the sample for explaining the flow side. The titles in the diagram indicate the following: 100.200,300...single crystal silicon substrate, 1
01゜104.204,304,106,307,30
9... Silicon oxide film, 102... Molybdenum film,
103,203,303...Molybdenum silicide layer, 1
05.305...Exposed surface of molybdenum silicide, 10
7,207,310... Phosphorus diffusion layer, 206... Phosphorus-doped silicon oxide film, 306... Molybdenum silicide wiring, 308... Exposed surface of molybdenum silicide wiring. Figure 2 Figure 3 j/U

Claims (1)

[Claims] 1. A step of forming a conductive thin film on a semiconductor substrate or a semiconductor thin film, and producing a large amount of alloying reaction sound between the conductive thin film and the semiconductor at a place where the conductive thin film and the semiconductor come into contact. A step of forming a crystalline alloy layer and a polycrystalline conductive material connected to the polycrystalline alloy layer or the polycrystalline alloy layer
forming an insulating film entirely to cover the wiring, and opening a predetermined area of the insulating film completely to expose a part of the polycrystalline alloy layer or a group of wiring made of the polycrystalline conductive material t-i. After that, the polycrystalline alloy layer or A method for diffusing impurities into a semiconductor, comprising the step of diffusing impurities into a semiconductor region in contact with the polycrystalline alloy layer through the wiring made of the polycrystalline conductive material and the polycrystalline alloy layer. 2. A step of forming a conductive thin film on a semiconductor substrate or a semiconductor thin film, and forming a polycrystalline alloy layer by producing an alloying reaction sound between the conductive thin film and the semiconductor at a place where the conductive film and the semiconductor come into contact. a step of forming an insulating film in its entirety so as to cover the polycrystalline alloy layer or a wiring made of a polycrystalline conductive material connected to the polycrystalline alloy layer; and a step of opening a predetermined region of the insulating film. @Bulletin After exposing a part of the crystalline alloy layer or a part of the wiring made of the polycrystalline conductive material, an insulating film doped with impurities is applied to the protruding surface of the polycrystalline alloy layer or the polycrystalline conductive material. and then heat-treating the polycrystalline alloy layer or the wiring made of the polycrystalline conductive material and the semiconductor contacting the polycrystalline alloy layer through the polycrystalline alloy layer and the polycrystalline conductive material. 1. A method for diffusing impurities into a semiconductor, comprising the step of diffusing impurities into a region.