JPS60154638A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain a uniform structure without structually sparse regions and an approximately flat surface after etching in polycrystalline silicon filling an insulating and isolating groove on a silicon substrate, by heat treating the polycrystalline silicon at a specific temperature. CONSTITUTION:A groove 5 formed on the surface of a silicon substrate 1 is covered with an insulation film 2 and polycrystalline silicon is caused to grow in the groove. The polycrystalline silicon is then heat treated at a temperature between about 900 deg.C to 1,100 deg.C, preferebly at about 1,000 deg.C, in the presence of nitride. The polycrystalline silicon 13 thus heat treated is etched to form an insulating and isolating region whose upper surface is approximately flat and in continuation with the surface of the aperture of the groove 5. Since the polycrystalline silicon is kept in a uniform state by the high temperature heat treatment, no deep concave is produced at the center of the groove during the etching process.

Description

DETAILED DESCRIPTION OF THE INVENTION A. Field of Industrial Application The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing an integrated circuit in which elements are separated by insulation isolation regions.

BACKGROUND ART Conventionally, a selective oxidation method using a nitride film as a mask, the so-called LOCO8 method, has been used to form insulating isolation regions between elements in a semiconductor integrated circuit. This LOCO8 method has the disadvantage that the oxide film digs in laterally at the end of the insulation isolation pattern, resulting in a wider pattern width. moreover,
It was difficult to form deep isolation regions.

A trench isolation method (trench division method) is being considered as an insulation isolation method to replace the LOCO8 method.

In this separation method, a silicon substrate is etched by reactive ion etch (RIE) to a width of approximately 1 μm and a depth of 1 to 1 μm.
A groove with a cross section of about 5 μm and a substantially vertical shape is formed by burying, for example, polycrystalline silicon into the groove to flatten the surface. A polycrystalline silicon film formed by low-pressure chemical vapor deposition (LPCVD) has excellent step coverage, so when grown to a thickness comparable to the groove width, the groove is completely filled with polycrystalline silicon. Figure 1 (ta+) is a cross-sectional view showing the growth state of such polycrystalline silicon. combination etc. Reference numeral 3 is polycrystalline silicon, and only a slight el is formed in the central portion 4 of the groove 5. Next, the polycrystalline silicon 3 is etched and removed leaving only the groove 50 portion. At this time, since the etching rate is high along the center of the groove, a large depression 6 is formed at the center of the groove, as shown in FIG. 1 tbl.

This is because the polycrystalline silicon does not form a ladle near the center of the groove, resulting in a structurally sparse state.

C.9 Object of the Invention An object of the present invention is to provide a method for manufacturing a semiconductor device that eliminates this sparse state, provides a uniform structure, and makes the surface substantially flat after etching.

29 Structure of the Invention In the present invention, an insulating film on a silicon substrate! ? (The polycrystalline silicon filled with the trench for 1 is heat treated at 900 to 1100°C, preferably around 1000°C, to promote crystal grain growth of the polycrystalline silicon and create a uniform structure. It includes an etching process that leaves polycrystalline silicon only in flat grooves.

E, Example The present invention will now be explained by way of examples.

FIG. 2 is a partial cross-sectional view of an isolation region of a semiconductor device manufactured by the method of the present invention.

After forming a groove 5 with a groove width of about 1 μm on the surface of the silicon substrate 1, it is covered with an insulating film 2, and then polycrystalline silicon is grown to a thickness of about 1 μm, and then heated at 900°C for 1 μm.
Heat treatment is performed at a temperature of about 100°C, preferably about 1000°C, for about 30 minutes under nitrogen. Next, the polycrystalline silicon 13 after the heat treatment is etched to the same thickness as the polycrystalline silicon 13.
An insulating isolation region is formed which is continuous with the If3'rJ mouth surface of the groove 5 and has a substantially flat upper surface.

Note that it is known that when polycrystalline silicon is doped with impurities such as phosphorus or boron at a high concentration, the growth of crystal grains is promoted. Doping polycrystalline silicon with impurities before heat treating it is effective in achieving a uniform etching rate and obtaining a flat surface. Further, the heat treatment can also be performed only by high-temperature impurity diffusion, for example, boron or phosphorus diffusion at about 900° C. to 1000° C. Further, after thermal diffusion, nitrogen treatment at 1000°C and 8°C can also be performed.

According to the method of the present invention, the polycrystalline silicon is made homogeneous by high-temperature heat treatment before etching, leaving polycrystalline silicon only in the grooves, so that no depopulation occurs in the center of the grooves. For,
The conventional drawback that a deep recess is generated in the center during etching can be improved, and a semiconductor device having a highly reliable isolation region can be easily manufactured.

[Brief explanation of the drawing]

FIG. 1 (al and tbl are cross-sectional views illustrating the process of forming an isolation region of a conventional semiconductor device, and FIG. 2 shows an isolation region of a semiconductor device manufactured according to an embodiment of the present invention. 1 is a partial cross-sectional view showing 1... silicon substrate, 2... insulating film, 3, 1
3... polycrystalline silicon, 4... river, dent, 5...
Middle groove, 6...deep dent. Me ＼ Agent Patent Attorney Susumu Uchihara, 7',,,,r “1
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Claims (1)

[Claims] 1. A step of forming a trench for insulation isolation on one main surface of a silicon substrate, a step of filling the trench with polycrystalline silicon by a growth method, and then a step of heating from 900°C to 1100°C. °C
1. A method of manufacturing a semiconductor device, comprising the step of performing heat treatment at a temperature within the range of 10 to 10, and then removing polycrystalline silicon above the opening surface of the trench by etching. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the polycrystalline silicon filling the groove contains a large amount of impurities.