JP3097107B2 - Epitaxial growth method - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for epitaxially growing silicon on a silicon wafer, and more particularly to a method for epitaxially growing silicon on a silicon wafer having a buried diffusion layer of high concentration phosphorus or arsenic. It concerns a method of growing a layer.

[Conventional technology]

Conventionally, in this type of epitaxial growth method, as shown in FIG. 3, a gas etching step 8 for etching the surface of a silicon wafer embedded in high concentration phosphorus or arsenic using HCl gas at a temperature of 1150 ° C. is performed. Then, an epitaxial growth step 7 of epitaxially growing the film to a predetermined thickness using a SiH ₄ gas at a temperature of 1050 ° C. was performed.

Further, when a high concentration of As or P is diffused in the buried diffusion layer, a method of performing heat treatment in an oxidizing atmosphere to adjust the buried diffusion layer to a desired depth and impurity concentration is adopted. When a buried diffusion layer is formed by this method, impurities such as As and P are pushed out to the silicon side of the Si / SiO ₂ interface, and abnormalities appear on the surface of the silicon wafer as shown in the impurity concentration profile of FIG. It is generally known that a diffusion layer 1 having a high concentration is formed. When a buried silicon wafer having this impurity concentration profile is grown by the above-mentioned conventional epitaxial growth method, as shown in the impurity concentration profile 9 after the epitaxial growth in FIG. The thickness was decreasing.

[Problems to be solved by the invention]

In the above-described conventional epitaxial growth method, the diffusion layer having an abnormally high concentration on the As or P buried surface is etched in the gas etching step 8 using a high-temperature HCl gas. In addition, auto doping occurred during epitaxial growth. When low-concentration epitaxial growth is performed, the thickness of the substantial epitaxial growth layer is reduced by this auto-doping,
In particular, when a thin epitaxial growth layer such as a high-density, high-speed semiconductor device is used, there is a problem that characteristics of the semiconductor device are deteriorated.

SUMMARY OF THE INVENTION It is an object of the present invention to provide an epitaxial growth method for forming an epitaxially grown layer with extremely little autodoping.

[Means for solving the problem]

In order to achieve the above object, the epitaxial growth method according to the present invention includes an etching step, a hydrogen baking step,
A method for forming a silicon epitaxial growth layer on a silicon wafer on which a high concentration phosphorus or arsenic buried layer is formed, wherein the buried layer is subjected to a heat treatment after impurity diffusion. A surface diffusion layer having a higher concentration than the inside; and the etching step is to etch the surface diffusion layer with a hydrogen chloride gas at a temperature lower than the growth temperature. Hydrogen baking the silicon wafer using hydrogen gas at a temperature higher than the growth temperature.The subsequent layer forming step is to form an epitaxially grown layer at a desired low concentration on the silicon wafer surface. The hydrogen baking step and the layer forming step are continuously performed in the same furnace.

[Action]

In forming a silicon epitaxial growth layer on a silicon wafer on which a buried layer of high concentration P or As is formed, first, a silicon wafer surface is etched with HCl gas at a temperature lower than the growth temperature, and then a temperature higher than the growth temperature. Is performed, and an epitaxial growth layer is formed at a desired low concentration.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

1 (A) to 1 (D) are diagrams showing the impurity concentration profiles for each step in one embodiment of the present invention.
FIG. 1 is a diagram schematically showing an epitaxial growth method according to one embodiment of the present invention.

First, FIG. 1 (A) shows the result of selectively forming a buried diffusion layer on the surface of a silicon wafer by a conventional method and measuring the impurity concentration profile by the SR method. As is clear from the figure, it was confirmed that there was a diffusion layer 1 having an abnormally high concentration on the surface of the buried layer. The silicon wafer used at this time is an N type conductivity type having an impurity concentration of 2 × 10 ¹⁴ (cm ⁻³ ), and the buried diffusion is 1 × 10 ¹⁹ (cm ³ ) using P as an impurity source. ^-3 ) The concentration was adjusted to 4.5 μm in depth.

Next, the P-embedded silicon wafer was loaded into an epitaxial growth apparatus, and HCl was heated at a temperature of 950 ° C.
FIG. 1 (B) shows the result of performing a gas etching step 5 in which the surface of the silicon wafer is gas-etched with a gas by 0.3 μm using a gas for 10 minutes. After the completion of this step, the silicon wafer is taken out and the impurity concentration profile is confirmed. As is apparent from the figure, the diffusion layer 1 having an abnormally high concentration generated during the buried diffusion by the etching is removed by the etching, and the surface concentration 2 of 1 × 10 ¹⁹ (cm ⁻³ ) which is a desired surface concentration is obtained. This was confirmed by this experiment.

Next, after the gas etching step 5, 1150
FIG. 1 (C) shows the result of hydrogen baking step 6 in which hydrogen baking is performed at a temperature of ° C. for 10 minutes using H ₂ gas, and after completion of this step, the silicon wafer is taken out and the impurity concentration profile is confirmed. As is clear from the figure, it was confirmed by this experiment that P in the vicinity of the surface was evaporated by the high-temperature hydrogen baking step 6 and the surface concentration 3 was reduced to 1 × 10 ¹⁸ (cm ⁻³ ). .

Next, as shown in FIG. 2, a gas etching step 5 and a hydrogen baking step 6 are performed continuously, and
Epitaxial growth was performed at a temperature of 50 ° C. using SiH ₄ gas for 10 minutes, and an impurity concentration profile after the completion of the epitaxial growth step 7 was measured. As a result of the measurement, as shown in FIG. 1 (D), the interface 4 between the epitaxial growth layer and the substrate is sharp, and it can be seen that the auto-doping to the epitaxial growth layer is extremely small. The conditions of gas etching and hydrogen baking used at this time were the same as those in the above experiment, and the concentration during epitaxial growth was as low as 2 × 10 ¹⁵ (cm ⁻³ ) and the growth was 3 μm at a low concentration.

〔The invention's effect〕

As described above, the present invention provides a method for forming a silicon epitaxial growth layer on a silicon wafer on which a high-concentration P or As buried layer is formed, by etching a silicon wafer with HCl gas at a temperature lower than the growth temperature, By performing hydrogen baking at a temperature higher than the growth temperature and then performing epitaxial growth at a desired low concentration, an epitaxial growth layer with very little auto-doping can be formed. In particular, the characteristics of high-density, high-speed semiconductor devices deteriorate. There is an effect that can be prevented.

BRIEF DESCRIPTION OF THE DRAWINGS FIGS. 1 (A) to 1 (D) are diagrams showing an impurity concentration profile for each step in one embodiment of the present invention.
Is a diagram showing an impurity concentration profile after buried diffusion,
(B) is a diagram showing an impurity concentration profile after gas etching, (C) is a diagram showing an impurity concentration profile after hydrogen baking, (D) is a diagram showing an impurity concentration profile after epitaxial growth, and FIG. 2 is the present invention. FIG. 3 is a diagram schematically illustrating the conventional epitaxial growth method, FIG. 3 is a diagram schematically illustrating the conventional epitaxial growth method, and FIG. 4 is a diagram illustrating an impurity concentration profile when the conventional epitaxial growth method is used. 5 gas etching step, 6 hydrogen baking step 7 epitaxial growth step

Claims (1)

(57) [Claims] 1. An epitaxial growth method for forming a silicon epitaxial growth layer on a silicon wafer on which a high concentration phosphorus or arsenic buried layer is formed, comprising an etching step, a hydrogen baking step, and a layer forming step. The buried layer is formed by performing a heat treatment after impurity diffusion, and has a surface diffusion layer having a higher concentration than the inside, and the etching step includes performing the surface diffusion with hydrogen chloride gas at a temperature lower than a growth temperature. The subsequent hydrogen baking step is a step of hydrogen baking the silicon wafer using hydrogen gas at a temperature higher than the growth temperature, and the subsequent layer forming step is a step of forming a desired low concentration on the silicon wafer surface. Forming an epitaxial growth layer by the etching step, the hydrogen baking step, and the layer formation. Epitaxial growth method, which comprises carrying out in the same furnace continuously extent.