JP2004039946A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To lower interface level density in an interface with an oxide film in a semiconductor device having an MOS structure using an SiC semiconductor. <P>SOLUTION: A dozens to hundreds nm-thick Si epitaxial layer 106 is formed by performing epitaxial growth for Si on an SiC epitaxial layer 104 at 1,050 to 1,250°C by using mixture gas of SiH<SB>4</SB>, N<SB>2</SB>by CVD. An SiO<SB>2</SB>film 108 is formed by thermally oxidizing the upper layer part of the Si epitaxial layer 106 so that the Si epitaxial layer 106 remains by 100nm or less, preferably by 1 to 5nm at 1,000 to 1,250°C in an oxygen atmosphere. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a technology for manufacturing a semiconductor device having a MOS (Metal Oxide Semiconductor) structure using a SiC (silicon carbide) semiconductor.
[0002]
[Prior art]
Since the SiC semiconductor has a wide band gap, it has excellent heat resistance and is suitable for use at high temperatures. Further, since the on-resistance during operation is low, a large current can flow even in a small size, which is suitable for miniaturization.
[0003]
Conventionally, when a semiconductor device having a MOS structure is manufactured using such a SiC semiconductor, for example, in the already-proposed examples described in Japanese Patent Publication No. 5-5182 and Japanese Patent Application Laid-Open No. 8-51110, SiC is used. A MOS structure is realized by forming a thin Si (silicon) layer on the layer, thermally oxidizing the Si layer to form a SiO ₂ (silicon oxide) layer, and forming a metal electrode thereon. I was
[0004]
[Problems to be solved by the invention]
However, in such a proposed example, since the Si layer is thermally oxidized and is entirely replaced with SiO ₂ , the SiO ₂ layer is disposed immediately above the SiC layer, and the SiC layer and the SiO ₂ layer are separated from each other. Will come in contact. Generally, the interface between the SiC layer and the SiO ₂ layer tends to have a high interface state density, and is known to be, for example, about one digit higher than the interface between the Si layer and the SiO ₂ layer. .
[0005]
As described above, in the already-proposed example, since the interface state density at the interface between the SiC layer and the SiO ₂ layer is high, problems such as a decrease in channel mobility, an increase in on-resistance, and a decrease in withstand voltage are caused. Had occurred.
[0006]
Accordingly, it is an object of the present invention to solve the above-mentioned problems of the prior art and to provide a technique for manufacturing a semiconductor device capable of reducing the interface state density at the interface with an oxide film.
[0007]
[Means for Solving the Problems and Their Functions and Effects]
In order to achieve at least a part of the above object, a first manufacturing method of the present invention is a method for manufacturing a semiconductor device,
(A) providing a silicon carbide layer;
(B) forming a silicon epitaxial layer by epitaxially growing silicon on the silicon carbide layer;
(C) oxidizing an upper layer of the silicon epitaxial layer;
The gist is to provide
[0008]
According to the manufacturing method of the present invention, when the silicon epitaxial layer is oxidized, not the entire silicon epitaxial layer is oxidized, but the upper layer is oxidized. ) Does not come into contact with the silicon carbide layer, but comes into contact with the silicon epitaxial layer, and an interface between the silicon layer and the silicon oxide layer is formed. In addition, the interface state density can be reduced by about one digit, and the channel mobility can be increased, the on-resistance can be reduced, and the withstand voltage can be increased.
[0009]
In the first manufacturing method of the present invention, it is preferable that in the step (c), the silicon epitaxial layer is oxidized so that the silicon epitaxial layer remains at 100 nm or less.
[0010]
As described above, by leaving the silicon epitaxial layer very thin, although the silicon layer is in contact at the interface with the silicon oxide layer as the oxide film, the influence of the silicon layer on the entire semiconductor device can be suppressed as much as possible.
[0011]
A second manufacturing method of the present invention is a method for manufacturing a semiconductor device,
(A) providing a silicon carbide layer;
(B) forming a first silicon epitaxial layer by epitaxially growing silicon on the silicon carbide layer;
(C) forming a silicon carbide oxidation inhibiting layer by epitaxially growing silicon carbide on the first silicon epitaxial layer;
(D) forming a second silicon epitaxial layer by epitaxially growing silicon on the silicon carbide oxidation inhibiting layer;
(E) oxidizing the second silicon epitaxial layer and oxidizing part or all of the silicon carbide oxidation inhibiting layer;
The gist is to provide
[0012]
According to the manufacturing method of the present invention, a silicon carbide oxidation inhibiting layer is provided between the first silicon epitaxial layer and the second silicon epitaxial layer, and at the time of oxidation, the second silicon epitaxial layer is oxidized. By oxidizing a part or all of the silicon carbide oxidation inhibiting layer, the first Si epitaxial layer below the silicon carbide oxidation inhibiting layer can be left. As a result, the oxide film (silicon oxide layer) formed by oxidation comes into contact with the first silicon epitaxial layer instead of contacting with the silicon carbide layer, and the interface between the silicon layer and the silicon oxide layer is formed. As a result, the interface state density can be reduced by about one digit, the channel mobility can be increased, the on-resistance can be reduced, and the withstand voltage can be reduced. Or higher.
[0013]
In the second manufacturing method of the present invention, the step (e) includes a step of adjusting the oxidation time, oxidizing the second silicon epitaxial layer, and then stopping the oxidation in the silicon carbide oxidation inhibiting layer. It may be included.
[0014]
Since the oxidation rate of silicon carbide is about one order of magnitude slower than the oxidation rate of silicon, oxidation proceeds rapidly in the second silicon epitaxial layer, but proceeds slowly when it enters the silicon carbide oxidation inhibiting layer. Will be. Therefore, by appropriately adjusting the oxidation time, after all the second silicon epitaxial layer has been oxidized, the oxidation can be easily stopped in the silicon carbide oxidation suppressing layer, and the oxidized portion can be controlled. As a result, the first silicon epitaxial layer can be left.
[0015]
In the second manufacturing method of the present invention, in the step (b), it is preferable that the first silicon epitaxial layer is formed with a thickness of 100 nm or less.
[0016]
As described above, by forming the first silicon epitaxial layer very thinly, it is possible to suppress the influence of the silicon layer on the entire semiconductor device as much as possible, although the silicon layer is in contact with the interface with the silicon oxide layer as the oxide film. it can.
[0017]
In the second manufacturing method of the present invention, in the step (c), it is preferable that the silicon carbide oxidation inhibiting layer is formed to a thickness of 10 nm or less.
[0018]
As described above, by forming the silicon carbide oxidation suppressing layer to be extremely thin, the amount of carbon in the silicon carbide oxidation suppressing layer can be reduced.
[0019]
In the second production method of the present invention, it is preferable that the step (e) includes a step of diffusing or evaporating carbon present in the silicon carbide oxidation inhibiting layer.
[0020]
By including such a step, finally, the amount of carbon remaining in the suppression of silicon carbide oxidation can be reduced, and the influence of carbon can be eliminated.
[0021]
Note that the present invention is not limited to aspects of the method invention such as the manufacturing method described above, but can also be realized in aspects of a device invention such as a semiconductor device.
[0022]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described in the following order based on examples.
A. First embodiment:
B. Second embodiment:
C. Concrete example:
[0023]
A. First embodiment:
FIG. 1 is a sectional view schematically showing a manufacturing procedure of a basic component of a semiconductor device according to a first embodiment of the present invention. The semiconductor device of this embodiment is a semiconductor device having a MOS structure using a SiC semiconductor.
[0024]
First, an n ⁺ -type SiC wafer 102 having a film thickness of several hundred μm is prepared in a processing furnace, and SiH ₄ (silane), C ₃ H ₈ (propane), and N ₂ (nitrogen) are formed by CVD (Chemical Vapor Deposition). using a mixed gas of, at 1400 to 2000 ° C., the surface of the SiC wafer 102, n ^- type of SiC is epitaxially grown, n ^- -type the SiC epitaxial layer 104 to a thickness of several to several tens μm formed in (FIG. 1 (a)).
[0025]
Next, in the same processing furnace, Si is epitaxially grown on the SiC epitaxial layer 104 at a lower temperature of 1050 to 1250 ° C. by using a mixed gas of SiH ₄ and N ₂ by CVD. The epitaxial layer 106 is formed with a thickness of several tens to several hundreds of nm (FIG. 1B).
[0026]
Note that PH ₃ (phosphine) or AsH ₃ (arsine) may be used as the mixed gas instead of N ₂ (nitrogen). Also, instead of performing in the same processing furnace as before, the SiC wafer 102 after processing is transferred in an Ar (argon) atmosphere or vacuum without opening to the air, transferred to a different processing furnace, and It may be performed.
[0027]
Next, the processed SiC wafer 102 is transferred to an oxidation furnace, and the upper layer of the Si epitaxial layer 106 is left in an oxygen atmosphere at 1000 to 1250 ° C. so as to leave the Si epitaxial layer 106 at 100 nm or less, preferably 1 to 5 nm. The portion is thermally oxidized to form an SiO ₂ film 108 (FIG. 1C).
[0028]
Note that water vapor may be contained in the oxygen atmosphere.
[0029]
Thus, the basic components of the semiconductor device composed of the SiO ₂ film / Si epitaxial layer / SiC epitaxial layer / SiC wafer are completed. Thereafter, for example, by depositing a metal (Metal) such as Al (aluminum) or poly-Si (polysilicon) on the SiO ₂ layer 108, a semiconductor device having a MOS structure can be obtained.
[0030]
As described above, according to the present embodiment, when the Si epitaxial layer 106 is thermally oxidized to form the SiO ₂ layer 108, the entire Si epitaxial layer 106 is not oxidized, but 100 nm or less, preferably Since the upper layer of the Si epitaxial layer 106 is oxidized so as to leave 1 to 5 nm, the SiO ₂ layer 108, which is an oxide film, does not come into contact with the SiC epitaxial layer 104, Will come into contact with. Therefore, the interface between the Si layer and the SiO ₂ layer is formed instead of the interface between the SiC layer and the SiO ₂ layer. Thus, the channel mobility can be increased, the on-resistance can be reduced, and the withstand voltage can be increased.
[0031]
As described above, according to the present embodiment, when the Si epitaxial layer 106 is thermally oxidized to form the SiO ₂ layer 108, the entire Si epitaxial layer 106 is not oxidized, but 100 nm or less, preferably Since the upper layer of the Si epitaxial layer 106 is oxidized so as to leave 1 to 5 nm, the SiO ₂ layer 108, which is an oxide film, does not come into contact with the SiC epitaxial layer 104, Will come into contact with. Therefore, the interface between the Si layer and the SiO ₂ layer is formed instead of the interface between the SiC layer and the SiO ₂ layer. Thus, the channel mobility can be increased, the on-resistance can be reduced, and the withstand voltage can be increased.
[0032]
B. Second embodiment:
FIG. 2 is a sectional view schematically showing a manufacturing procedure of a basic component of a semiconductor device as a second embodiment of the present invention. The semiconductor device of this embodiment is a semiconductor device having a MOS structure using a SiC semiconductor.
[0033]
First, an n ⁺ -type SiC wafer 202 having a thickness of several hundred μm is prepared in a processing furnace, and SiC is used at 1400 to 2000 ° C. by CVD using a mixed gas of SiH ₄ , C ₃ H ₈ , and N _2. On the surface of the wafer 202, n ⁻ -type SiC is epitaxially grown to form an n ⁻ -type SiC epitaxial layer 204 having a thickness of several to several tens μm (FIG. 2A).
[0034]
Next, in the same processing furnace, Si is epitaxially grown on the SiC epitaxial layer 204 by CVD using a mixed gas of SiH ₄ and N _{2 at} a lower temperature of 1050 to 1250 ° C. The 1Si epitaxial layer 206 is formed with a thickness of 100 nm or less (FIG. 2B).
[0035]
In addition, instead of using PH ₃ (phosphine) or AsH ₃ (arsine) instead of N ₂ (nitrogen) as a mixed gas, or performing the same gas in the same processing furnace, an Ar (argon) atmosphere without opening to the atmosphere is used. Alternatively, as in the first embodiment, the SiC wafer 102 that has been processed in a vacuum may be transported, transferred to a different processing furnace, and performed in that processing furnace.
[0036]
Next, in the same processing furnace, on the first Si epitaxial layer 206 by CVD using a mixed gas of SiH ₄ , C ₃ H ₈ , and N _{2 at} the same temperature as above (1050 to 1250 ° C.). SiC is epitaxially grown to form a SiC oxidation suppressing layer 208 having a thickness of 10 nm or less (FIG. 2C).
[0037]
Note that, instead of performing at the same temperature as when the first Si epitaxial layer 206 is formed, the first Si epitaxial layer 206 may be performed at a different temperature at which the first Si epitaxial layer 206 does not disappear or undergo surface cracking due to melting or evaporation.
[0038]
Next, in the same processing furnace, Si is epitaxially grown on the SiC oxidation suppressing layer 208 by CVD using a mixed gas of SiH ₄ and N ₂ at 1,050 to 1,250 ° C. to form a second Si epitaxial layer 210. Is formed (FIG. 2D).
[0039]
Note that the film thickness to be formed is set as appropriate in accordance with required characteristics of the semiconductor device.
[0040]
Next, the processed SiC wafer 102 is transferred to an oxidation furnace, and the second Si epitaxial layer 210 and the SiC oxidation inhibiting layer 208 are thermally oxidized in an oxygen atmosphere at a relatively low temperature of 1000 to 1200 ° C. to form an SiO ₂ film 212. Is formed (FIG. 2E).
[0041]
At this time, the oxidation rate of SiC is about one digit or more slower than the oxidation rate of Si, so oxidation proceeds rapidly in the second Si epitaxial layer 210, but when entering the SiC oxidation suppressing layer 208, oxidation proceeds. You will go slowly. Therefore, by appropriately adjusting the oxidation time, the oxidation can be easily stopped in the SiC oxidation suppression layer 208 after the second Si epitaxial layer 210 is entirely oxidized.
[0042]
In this way, by controlling the oxidized portion, the first Si epitaxial layer 206 having a very small thickness (100 nm or less, preferably 1 to 5 nm) can be left.
[0043]
By the way, C (carbon) is present in the SiC oxidation suppression layer 208. When the SiC oxidation suppression layer 208 is formed, the film thickness is reduced to reduce the overall amount of C. Finally, the amount of C remaining in the SiC oxidation suppressing layer 208 can be reduced. Alternatively, after performing thermal oxidation, when performing heat treatment in an H ₂ (hydrogen) atmosphere or performing thermal oxidation, the processing temperature (oxidation temperature) is increased to 1200 to 1300 ° C. for a short time (for example, several minutes). By diffusing and evaporating C existing in the SiC oxidation suppressing layer 208, the amount of C remaining in the SiC oxidation suppressing layer 208 can be finally reduced. In addition, C present in the SiC oxidation suppressing layer 208 is diffused and evaporated by extending the processing time while the processing temperature (oxidation temperature) is lowered, or by performing an oxidation process in a steam atmosphere. Can be done.
[0044]
Thus, the basic components of the semiconductor device composed of the SiO ₂ film / Si epitaxial layer / SiC epitaxial layer / SiC wafer are completed. Thereafter, for example, by depositing a metal (Metal) such as Al (aluminum) or poly-Si (polysilicon) on the SiO ₂ layer 108, a semiconductor device having a MOS structure can be obtained.
[0045]
As described above, according to the present embodiment, the SiC oxidation suppressing layer 208 is provided between the first Si epitaxial layer 206 and the second Si epitaxial layer 210, and the entire second Si epitaxial layer 210 is oxidized during oxidation. After that, the oxidation is stopped in the SiC oxidation inhibiting layer 208, thereby leaving the thin (100 nm or less, preferably 1 to 5 nm) first Si epitaxial layer 206 under the SiC oxidation inhibiting layer 208. be able to. Therefore, finally, the SiO ₂ layer 108, which is an oxide film, does not contact the SiC epitaxial layer 104 but contacts the Si epitaxial layer 106. Therefore, the interface between the Si layer and the SiO ₂ layer is formed instead of the interface between the SiC layer and the SiO ₂ layer. Thus, the channel mobility can be increased, the on-resistance can be reduced, and the withstand voltage can be increased.
[0046]
C. Concrete example:
Next, a method for manufacturing, for example, a vertical MOSFET using the basic components of the semiconductor device obtained in the first or second embodiment will be described. The manufacturing method is the same in the case of using the basic components of the first embodiment and the case of using the basic components of the second embodiment. The case where a part is used will be described as an example.
[0047]
FIG. 3 is a cross-sectional view schematically showing a process of manufacturing a vertical MOSFET using the basic components of the first embodiment.
[0048]
First, a basic component of a semiconductor device composed of the iO ₂ film / Si epitaxial layer / SiC epitaxial layer / SiC wafer obtained in the first embodiment is prepared (FIG. 3A), and ion implantation is performed. B (boron), Al, or the like is implanted into the p-type region 110, and N (nitrogen), As (arsenic), or P (phosphorus) is implanted into the n-type region 112, and then activation annealing is performed. (FIG. 3B).
[0049]
Next, a mask having an opening in a region where a drain electrode and a source electrode are to be formed is formed by photolithography, and dry etching such as RIE (Reactive Ion Etching) is performed using the mask to form an SiO ₂ film in the region. Removed to expose SiC.
[0050]
Next, in the above region, Ni (nickel) or Al is deposited, or Ti (titanium) and Ni are deposited in a multilayer film to form a drain electrode 114 and a source electrode 116, and then heat treatment is performed. To form an ohmic junction.
[0051]
Next, in a region where a gate electrode is to be formed, Al, poly Si, or the like is sputter-deposited or poly-Si is formed by CVD to form a gate electrode 118, and RIE is performed using a mask formed by photolithography. The transistor structure is formed by performing dry etching such as (FIG. 3C).
[0052]
The present invention is not limited to the above-described examples and embodiments, and can be implemented in various modes without departing from the gist thereof.
[0053]
In the above-described second embodiment, after the second Si epitaxial layer 210 is completely oxidized, the oxidation is stopped in the SiC oxidation suppressing layer 208. However, the entire SiC oxidation suppressing layer 208 is oxidized. Alternatively, when the first Si epitaxial layer 206 thereunder is formed to be relatively thick, the first Si epitaxial layer 206 may be oxidized up to the upper layer. Finally, it is sufficient that at least the first Si epitaxial layer 206 remains.
[Brief description of the drawings]
FIG. 1 is a sectional view schematically showing a manufacturing procedure of a basic component of a semiconductor device as a first embodiment of the present invention.
FIG. 2 is a cross-sectional view schematically showing a manufacturing procedure of a basic component of a semiconductor device as a second embodiment of the present invention.
FIG. 3 is a cross-sectional view schematically showing a process of manufacturing a vertical MOSFET using the basic components of the first embodiment.
[Explanation of symbols]
102 ... SiC wafer 104 ... SiC epitaxial layer 106 ... Si epitaxial layer 110 ... p type region 112 ... n type region 114 ... drain electrode 116 ... source electrode 118 ... gate electrode 202 ... SiC wafer 204 ... SiC epitaxial layer 206 ... first Si epitaxial Layer 208: SiC oxidation suppressing layer 210: Second Si epitaxial layer

Claims (9)

A method for manufacturing a semiconductor device, comprising:
(A) providing a silicon carbide layer;
(B) forming a silicon epitaxial layer by epitaxially growing silicon on the silicon carbide layer;
(C) oxidizing an upper layer of the silicon epitaxial layer;
A method for manufacturing a semiconductor device comprising: The method according to claim 1,
In the step (c), the silicon epitaxial layer is oxidized so as to leave the silicon epitaxial layer at 100 nm or less. A method for manufacturing a semiconductor device, comprising:
(A) providing a silicon carbide layer;
(B) forming a first silicon epitaxial layer by epitaxially growing silicon on the silicon carbide layer;
(C) forming a silicon carbide oxidation inhibiting layer by epitaxially growing silicon carbide on the first silicon epitaxial layer;
(D) forming a second silicon epitaxial layer by epitaxially growing silicon on the silicon carbide oxidation inhibiting layer;
(E) oxidizing the second silicon epitaxial layer and oxidizing part or all of the silicon carbide oxidation inhibiting layer;
A method for manufacturing a semiconductor device comprising: The manufacturing method according to claim 3,
The step (e) includes a step of adjusting the oxidation time to oxidize the second silicon epitaxial layer and then stopping the oxidation in the silicon carbide oxidation inhibiting layer. The manufacturing method according to claim 3,
In the step (b), the first silicon epitaxial layer is formed with a thickness of 100 nm or less. The manufacturing method according to claim 3,
In the step (c), the silicon carbide oxidation inhibiting layer is formed to a thickness of 10 nm or less. The manufacturing method according to claim 3,
The manufacturing method, wherein the step (e) includes a step of diffusing or evaporating carbon present in the silicon carbide oxidation inhibiting layer. A semiconductor device, comprising: a silicon carbide layer; a silicon epitaxial layer disposed on the silicon carbide layer and formed by epitaxial growth; and a silicon oxide layer disposed on the silicon epitaxial layer. The semiconductor device according to claim 8,
The semiconductor device, wherein the silicon epitaxial layer has a thickness of 100 nm or less.

Images