JPS57176729A - Forming method for pattern - Google Patents
Forming method for patternInfo
- Publication number
- JPS57176729A JPS57176729A JP6290481A JP6290481A JPS57176729A JP S57176729 A JPS57176729 A JP S57176729A JP 6290481 A JP6290481 A JP 6290481A JP 6290481 A JP6290481 A JP 6290481A JP S57176729 A JPS57176729 A JP S57176729A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- film
- layer
- wet etching
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
Abstract
PURPOSE:To obtain a pattern having no irregular wet etching by selectively removing an insulating film of upper layer of the insulating layer laminated on a semiconductor substrate and covering the all surface of the substrate with a hydrophilic and water soluble organic substance. CONSTITUTION:A resist film pattern 4 is formed on the first layer insulating film 2 and second layer insulating films 3 laminated on a semiconductor substrate 1, the film 3 is selectively removed using the pattern 4 as a mask, and a thin film layer 5 made a of hydrophilic and water soluble organic substance is formed on the overall surface of the substrate 1, thereby forming a desired pattern by wet etching at the film 2. In this manner, the etchant is immersed upto the surface of the film 2 even in fine pattern, thereby performing wet etching without irregularity.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6290481A JPS57176729A (en) | 1981-04-23 | 1981-04-23 | Forming method for pattern |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP6290481A JPS57176729A (en) | 1981-04-23 | 1981-04-23 | Forming method for pattern |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57176729A true JPS57176729A (en) | 1982-10-30 |
Family
ID=13213700
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP6290481A Pending JPS57176729A (en) | 1981-04-23 | 1981-04-23 | Forming method for pattern |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57176729A (en) |
-
1981
- 1981-04-23 JP JP6290481A patent/JPS57176729A/en active Pending
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