JPS57169249A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS57169249A
JPS57169249A JP5357381A JP5357381A JPS57169249A JP S57169249 A JPS57169249 A JP S57169249A JP 5357381 A JP5357381 A JP 5357381A JP 5357381 A JP5357381 A JP 5357381A JP S57169249 A JPS57169249 A JP S57169249A
Authority
JP
Japan
Prior art keywords
processing strain
protective film
layer
oxidation
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5357381A
Other languages
Japanese (ja)
Inventor
Kouichirou Takahata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP5357381A priority Critical patent/JPS57169249A/en
Publication of JPS57169249A publication Critical patent/JPS57169249A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To protect the gettering function of a semiconductor substrate by forming a protective film to the substrate after gettering treatment or retarding the oxidation of a processing strain surface. CONSTITUTION:Adhesive layer SiO24 and the protective film Si3N45 are shaped onto a processing strain 2 formed to the substrate 1 in a method using the protective film. A field oxide film 3 for LOCOS is formed, but the function of a processing strain layer is protected because the protective film is not oxidized. W, Ta or Ni may be used as the protective film, and poly Si or SiO2 may be employed directly as the protective layer without shaping the adhesive layer. The substrates 12, 13 are placed on a base plate 14 on a plane so that the processing strain surfaces are fast stuck when oxidation or the processing strain surfaces are mutually directed back to back and oxidized as a method using no protective film, and the oxidation of the processing strain surfaces is retarded, thus protecting the gettering function of the processing strain layer.
JP5357381A 1981-04-09 1981-04-09 Manufacture of semiconductor device Pending JPS57169249A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5357381A JPS57169249A (en) 1981-04-09 1981-04-09 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5357381A JPS57169249A (en) 1981-04-09 1981-04-09 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS57169249A true JPS57169249A (en) 1982-10-18

Family

ID=12946569

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5357381A Pending JPS57169249A (en) 1981-04-09 1981-04-09 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS57169249A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04267339A (en) * 1991-02-21 1992-09-22 Toshiba Corp Semiconductor substrate and its manufacture

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4998182A (en) * 1973-01-19 1974-09-17
JPS5618412A (en) * 1979-07-25 1981-02-21 Fujitsu Ltd Manufacture of semiconductor element

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4998182A (en) * 1973-01-19 1974-09-17
JPS5618412A (en) * 1979-07-25 1981-02-21 Fujitsu Ltd Manufacture of semiconductor element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04267339A (en) * 1991-02-21 1992-09-22 Toshiba Corp Semiconductor substrate and its manufacture
US5389551A (en) * 1991-02-21 1995-02-14 Kabushiki Kaisha Toshiba Method of manufacturing a semiconductor substrate

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