JPS57164355A - Input and output interface device - Google Patents

Input and output interface device

Info

Publication number
JPS57164355A
JPS57164355A JP56048591A JP4859181A JPS57164355A JP S57164355 A JPS57164355 A JP S57164355A JP 56048591 A JP56048591 A JP 56048591A JP 4859181 A JP4859181 A JP 4859181A JP S57164355 A JPS57164355 A JP S57164355A
Authority
JP
Japan
Prior art keywords
data
input
channel
transfer speed
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56048591A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6250848B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html
Inventor
Joji Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56048591A priority Critical patent/JPS57164355A/ja
Publication of JPS57164355A publication Critical patent/JPS57164355A/ja
Publication of JPS6250848B2 publication Critical patent/JPS6250848B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP56048591A 1981-03-31 1981-03-31 Input and output interface device Granted JPS57164355A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56048591A JPS57164355A (en) 1981-03-31 1981-03-31 Input and output interface device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56048591A JPS57164355A (en) 1981-03-31 1981-03-31 Input and output interface device

Publications (2)

Publication Number Publication Date
JPS57164355A true JPS57164355A (en) 1982-10-08
JPS6250848B2 JPS6250848B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-10-27

Family

ID=12807640

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56048591A Granted JPS57164355A (en) 1981-03-31 1981-03-31 Input and output interface device

Country Status (1)

Country Link
JP (1) JPS57164355A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59173867A (ja) * 1983-03-22 1984-10-02 Fujitsu Ltd デイスクキヤツシユデ−タ転送制御方式
JPS61281349A (ja) * 1985-06-07 1986-12-11 Oki Electric Ind Co Ltd インタフエ−ス制御方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49112543A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-02-23 1974-10-26
JPS5010127U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-05-24 1975-02-01
JPS50103226A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-01-04 1975-08-15
JPS5422132A (en) * 1977-07-19 1979-02-19 Honeywell Inf Systems Data transfer controller
JPS55157051A (en) * 1979-05-25 1980-12-06 Nec Corp Disc cash system

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49112543A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-02-23 1974-10-26
JPS5010127U (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1973-05-24 1975-02-01
JPS50103226A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1974-01-04 1975-08-15
JPS5422132A (en) * 1977-07-19 1979-02-19 Honeywell Inf Systems Data transfer controller
JPS55157051A (en) * 1979-05-25 1980-12-06 Nec Corp Disc cash system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59173867A (ja) * 1983-03-22 1984-10-02 Fujitsu Ltd デイスクキヤツシユデ−タ転送制御方式
JPS61281349A (ja) * 1985-06-07 1986-12-11 Oki Electric Ind Co Ltd インタフエ−ス制御方法

Also Published As

Publication number Publication date
JPS6250848B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1987-10-27

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