JPS5684053A - Input-output control system of two-way digital transmission line - Google Patents

Input-output control system of two-way digital transmission line

Info

Publication number
JPS5684053A
JPS5684053A JP16132279A JP16132279A JPS5684053A JP S5684053 A JPS5684053 A JP S5684053A JP 16132279 A JP16132279 A JP 16132279A JP 16132279 A JP16132279 A JP 16132279A JP S5684053 A JPS5684053 A JP S5684053A
Authority
JP
Japan
Prior art keywords
input
output
indication signal
delay
operation start
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP16132279A
Other languages
Japanese (ja)
Other versions
JPS6324337B2 (en
Inventor
Isamu Ogawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP16132279A priority Critical patent/JPS5684053A/en
Publication of JPS5684053A publication Critical patent/JPS5684053A/en
Publication of JPS6324337B2 publication Critical patent/JPS6324337B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00Arrangements affording multiple use of the transmission path
    • H04L5/14Two-way operation using the same type of signal, i.e. duplex

Abstract

PURPOSE:To eliminate a waste of time due to delay by varying the delay of a signal on the operation start indication control line of a digital transmission line at its rise and fall. CONSTITUTION:Between input and output controllers 1 and 2, lines 101-10n for data transmission, input-output indication control line 201, operation start indication control line 203, and operation response control line 202 are provided. An input- output indication signal and operation start indication signal are outputted nearly at the same time and while the output of the operation response indication signal stops the output of the operation start indication signal, the stop of the output of the operation response indication signal stops the input-output indication signal. Delay circuit 230 that provides 2T delay at the rise of the above-mentioned operation start indication signal and nearly eliminates the delay at the fall of the indication is used to eliminate a waste of time 2T.
JP16132279A 1979-12-12 1979-12-12 Input-output control system of two-way digital transmission line Granted JPS5684053A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16132279A JPS5684053A (en) 1979-12-12 1979-12-12 Input-output control system of two-way digital transmission line

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16132279A JPS5684053A (en) 1979-12-12 1979-12-12 Input-output control system of two-way digital transmission line

Publications (2)

Publication Number Publication Date
JPS5684053A true JPS5684053A (en) 1981-07-09
JPS6324337B2 JPS6324337B2 (en) 1988-05-20

Family

ID=15732881

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16132279A Granted JPS5684053A (en) 1979-12-12 1979-12-12 Input-output control system of two-way digital transmission line

Country Status (1)

Country Link
JP (1) JPS5684053A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS604055U (en) * 1983-06-20 1985-01-12 株式会社富士通ゼネラル Bidirectional interface circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS604055U (en) * 1983-06-20 1985-01-12 株式会社富士通ゼネラル Bidirectional interface circuit
JPH0224293Y2 (en) * 1983-06-20 1990-07-03

Also Published As

Publication number Publication date
JPS6324337B2 (en) 1988-05-20

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