JPS56143746A - Time-division channel continuity test system - Google Patents
Time-division channel continuity test systemInfo
- Publication number
- JPS56143746A JPS56143746A JP4615280A JP4615280A JPS56143746A JP S56143746 A JPS56143746 A JP S56143746A JP 4615280 A JP4615280 A JP 4615280A JP 4615280 A JP4615280 A JP 4615280A JP S56143746 A JPS56143746 A JP S56143746A
- Authority
- JP
- Japan
- Prior art keywords
- time slot
- memory
- data
- written
- contents
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04M—TELEPHONIC COMMUNICATION
- H04M3/00—Automatic or semi-automatic exchanges
- H04M3/22—Arrangements for supervision, monitoring or testing
- H04M3/24—Arrangements for supervision, monitoring or testing with provision for checking the normal operation
- H04M3/244—Arrangements for supervision, monitoring or testing with provision for checking the normal operation for multiplex systems
Abstract
PURPOSE:To test continuity under software control without providing an unnecessary testing device, by providing a connecting means of sending the contents of the specific output time slot of a switching network back to the input time slot that corresponds to this output time slot. CONSTITUTION:Under a command from a central processor, test data T is written in address (a) of signal transmitting memory 22. Control memory 24 stores this test data in time slot (i) at the input part of data extraction device C, which extracts and transfers only this data to data transfer device D via return channel 34. Then, data T inserted into time slot (i) is written by control memory 16 in primary channel memory 12, transferred to secondary channel memory 20' and further to the 2nd input time slot, and written in signal receiving memory 14', where it is compared with the contents of signal transmitting memory 22 to check the continuity state.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4615280A JPS607427B2 (en) | 1980-04-10 | 1980-04-10 | Time-division channel continuity test method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4615280A JPS607427B2 (en) | 1980-04-10 | 1980-04-10 | Time-division channel continuity test method |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS56143746A true JPS56143746A (en) | 1981-11-09 |
JPS607427B2 JPS607427B2 (en) | 1985-02-25 |
Family
ID=12739003
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4615280A Expired JPS607427B2 (en) | 1980-04-10 | 1980-04-10 | Time-division channel continuity test method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS607427B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58205354A (en) * | 1982-05-25 | 1983-11-30 | Fujitsu Ltd | Testing system of exchange |
JPS609259A (en) * | 1983-06-16 | 1985-01-18 | ミテル・コ−ポレ−シヨン | Switching system testing circuit |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6237528A (en) * | 1985-08-12 | 1987-02-18 | Norihide Toyama | Unilateral rotary power transmission |
JPS63142433U (en) * | 1987-03-11 | 1988-09-20 |
-
1980
- 1980-04-10 JP JP4615280A patent/JPS607427B2/en not_active Expired
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58205354A (en) * | 1982-05-25 | 1983-11-30 | Fujitsu Ltd | Testing system of exchange |
JPS609259A (en) * | 1983-06-16 | 1985-01-18 | ミテル・コ−ポレ−シヨン | Switching system testing circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS607427B2 (en) | 1985-02-25 |
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