JPS5785128A - Multiplexer channel - Google Patents

Multiplexer channel

Info

Publication number
JPS5785128A
JPS5785128A JP16166880A JP16166880A JPS5785128A JP S5785128 A JPS5785128 A JP S5785128A JP 16166880 A JP16166880 A JP 16166880A JP 16166880 A JP16166880 A JP 16166880A JP S5785128 A JPS5785128 A JP S5785128A
Authority
JP
Japan
Prior art keywords
input
transfer control
output
circuit
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16166880A
Other languages
Japanese (ja)
Inventor
Junichi Kihara
Yoshiyuki Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP16166880A priority Critical patent/JPS5785128A/en
Publication of JPS5785128A publication Critical patent/JPS5785128A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10Program control for peripheral devices
    • G06F13/12Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To realize not only a multiplexer channel function but a selector channel function, by adding a block transfer control circuit to perform the block data transfer control between the own device and an input/output device. CONSTITUTION:When a block transfer start command is delivered to a block transfer control circuit 230 from an ROM218, a status request signal is produced and sent to an input/output device 113. The device 113 connected to a multiplexer channel 116 answers to the status request signal by a connection action the input and output devices through an input/output bus control circuit 221 and then transmits the status data to the circuit 230. Thus the state of the circuit 230 is not changed when the device 113 is busy. When the device 113 is set in the ready state, the data corresponding within a lead buffer register 210 is transmitted onto an input/output bus 112. After this, the data transfer of each byte is repeated without switching the input and output devices. In such a way, the data transfer control is also made possible in the selector mode.
JP16166880A 1980-11-17 1980-11-17 Multiplexer channel Pending JPS5785128A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16166880A JPS5785128A (en) 1980-11-17 1980-11-17 Multiplexer channel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16166880A JPS5785128A (en) 1980-11-17 1980-11-17 Multiplexer channel

Publications (1)

Publication Number Publication Date
JPS5785128A true JPS5785128A (en) 1982-05-27

Family

ID=15739560

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16166880A Pending JPS5785128A (en) 1980-11-17 1980-11-17 Multiplexer channel

Country Status (1)

Country Link
JP (1) JPS5785128A (en)

Similar Documents

Publication Publication Date Title
JPS5657377A (en) Signal control system
YU45696B (en) COMMUNICATION MULTIPLEXER DEVICE WITH VARIABLE PRIORITY PROGRAM
JPS5785128A (en) Multiplexer channel
JPS56110125A (en) Data processing device
JPS5723130A (en) Interface control system
JPS57141741A (en) Input and output control system
JPS56143746A (en) Time-division channel continuity test system
JPS5591009A (en) Switching control unit
JPS5717046A (en) Skew compensating circuit
JPS57136239A (en) Device address switching system
JPS57164355A (en) Input and output interface device
JPS56104559A (en) Data transmission method
JPS5760435A (en) Data transfer controlling system
JPS5526766A (en) Terminal-circuit-side transmitter circuit of repeater
JPS5643850A (en) Intermultiplexer communication control system
JPS5612154A (en) Answer signal transmission system
JPS56114026A (en) Data processor
JPS56137420A (en) Input and output controlling system
JPS57109024A (en) Interface controlling system
JPS6277666A (en) Buffer circuit
JPS5776621A (en) Data processing system having input and output system
JPS6491235A (en) Control system for counter circuit
JPS5684058A (en) Data transmission system
JPS558121A (en) Data switching device
JPS6458038A (en) Discriminating circuit for transfer system of channel interface