JPS6458038A - Discriminating circuit for transfer system of channel interface - Google Patents

Abstract

PURPOSE:To eliminate deterioration of the throughput at the transfer by discriminating an interlock system when the time is constantly fixed between the input and output changing points of two tag answer circuits and then deciding a DSF (data streaming feature) system when said time is variable. CONSTITUTION:A 1st tag answer circuit 5 transmits an answer tag signal with no delay against the tag signal sent to a channel from an input/output device, etc. While a 2nd tag answer circuit 6 transmits an answer tag signal after a fixed delay. A control circuit 11 usually transmits the output of the circuit 5 then transmits the outputs of both circuits 5 and 6 alternately at the time of discriminating the transfer system. At the time of discriminating, a transfer system discriminating means 10 counts the time required between a state changing point of the answer tag signals transmitted from both circuits 5 and 6 and that of the answer tag signals supplied to those circuits 5 and 6. Then the means 10 discriminates as an interlock transfer system when said time count value is constantly fixed by the prescribed frequency, then discriminates as a DSF system when the time count value is not fixed.