JPS57108912A - Bus driving circuit - Google Patents

Bus driving circuit

Info

Publication number
JPS57108912A
JPS57108912A JP18401380A JP18401380A JPS57108912A JP S57108912 A JPS57108912 A JP S57108912A JP 18401380 A JP18401380 A JP 18401380A JP 18401380 A JP18401380 A JP 18401380A JP S57108912 A JPS57108912 A JP S57108912A
Authority
JP
Japan
Prior art keywords
signal
circuit
control
output
driving circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18401380A
Other languages
Japanese (ja)
Inventor
Yukio Urushibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP18401380A priority Critical patent/JPS57108912A/en
Publication of JPS57108912A publication Critical patent/JPS57108912A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4208—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus
    • G06F13/4213—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a system bus, e.g. VME bus, Futurebus, Multibus with asynchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To secure the timing of a data signal from a bus driving circuit and a control signal, by delaying and outputting the control signal when the control signal is received within a prescribed period after the data signal from the bus driving circuit is received. CONSTITUTION:A data signal is inputted to a data-signal detecting means 7. A differentiating circuit 71 is composed of a digital differentiating circuit connected to respective data signal lines. The OR output of an OR circuit 72 is the output of the means 7 and used as a trigger signal for a single-shot circuit 8. The output of an outputting circuit 8 and a control signal inputted through a control-signal receiver 5b are ORed by an OR gate 9. A control signal outputted from the OR gate 9 is transferred to input and output equipment through a control-signal driver 6b.
JP18401380A 1980-12-26 1980-12-26 Bus driving circuit Pending JPS57108912A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18401380A JPS57108912A (en) 1980-12-26 1980-12-26 Bus driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18401380A JPS57108912A (en) 1980-12-26 1980-12-26 Bus driving circuit

Publications (1)

Publication Number Publication Date
JPS57108912A true JPS57108912A (en) 1982-07-07

Family

ID=16145799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18401380A Pending JPS57108912A (en) 1980-12-26 1980-12-26 Bus driving circuit

Country Status (1)

Country Link
JP (1) JPS57108912A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1049022A2 (en) * 1999-04-28 2000-11-02 Tenovis GmbH & Co. KG Bus system and client for such bus system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1049022A2 (en) * 1999-04-28 2000-11-02 Tenovis GmbH & Co. KG Bus system and client for such bus system
EP1049022A3 (en) * 1999-04-28 2006-04-12 Tenovis GmbH & Co. KG Bus system and client for such bus system

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