JPS57136239A - Device address switching system - Google Patents
Device address switching systemInfo
- Publication number
- JPS57136239A JPS57136239A JP56021229A JP2122981A JPS57136239A JP S57136239 A JPS57136239 A JP S57136239A JP 56021229 A JP56021229 A JP 56021229A JP 2122981 A JP2122981 A JP 2122981A JP S57136239 A JPS57136239 A JP S57136239A
- Authority
- JP
- Japan
- Prior art keywords
- address
- input
- data
- cpu
- output device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
- G06F12/0653—Configuration or reconfiguration with centralised address assignment
- G06F12/0661—Configuration or reconfiguration with centralised address assignment and decentralised selection
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Maintenance And Management Of Digital Transmission (AREA)
Abstract
PURPOSE:To realize switching of the address to self-diagnosis and returning to the original place under the control of a CPU., by providing a means to deliver the proper and common addresses to plural input/output devices connected to a serial line. CONSTITUTION:Serial data is supplied to an input/output device to be connected to a serial line from a CPU through a serial line 6. Thus each input/output device receives the data only when coincidence is obtained between the address of the data and the address of the corresponding input/output device. In case the contents of the data are identical with the data by which the device address is switched, an FF5 is set to switch 4 the own device address to an address output circuit 3 which is common to all devices. The CPU gives an instruction to each input/output device to switch the address successively. When all input/output devices have the same common address, the data is transferred among the input/ output devices with no intervention of the CPU to perform self-diagnosis. Then the CPU gives an instruction to return the address of each input/output device to the original place when the self-diagnosis is over.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56021229A JPS57136239A (en) | 1981-02-16 | 1981-02-16 | Device address switching system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56021229A JPS57136239A (en) | 1981-02-16 | 1981-02-16 | Device address switching system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57136239A true JPS57136239A (en) | 1982-08-23 |
Family
ID=12049189
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56021229A Pending JPS57136239A (en) | 1981-02-16 | 1981-02-16 | Device address switching system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57136239A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58223831A (en) * | 1982-06-23 | 1983-12-26 | Nec Corp | Selecting system of input and output device |
JPH02181851A (en) * | 1989-01-06 | 1990-07-16 | Iwaki Denshi Kk | Method and circuit for multi-access control |
-
1981
- 1981-02-16 JP JP56021229A patent/JPS57136239A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58223831A (en) * | 1982-06-23 | 1983-12-26 | Nec Corp | Selecting system of input and output device |
JPH02181851A (en) * | 1989-01-06 | 1990-07-16 | Iwaki Denshi Kk | Method and circuit for multi-access control |
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