JPS55138942A - Information signal transmitting and receiving device - Google Patents

Information signal transmitting and receiving device

Info

Publication number
JPS55138942A
JPS55138942A JP4666379A JP4666379A JPS55138942A JP S55138942 A JPS55138942 A JP S55138942A JP 4666379 A JP4666379 A JP 4666379A JP 4666379 A JP4666379 A JP 4666379A JP S55138942 A JPS55138942 A JP S55138942A
Authority
JP
Japan
Prior art keywords
data
circuit
response
time
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4666379A
Other languages
Japanese (ja)
Inventor
Kazuyoshi Taguchi
Yoshito Hagiwara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP4666379A priority Critical patent/JPS55138942A/en
Publication of JPS55138942A publication Critical patent/JPS55138942A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Small-Scale Networks (AREA)

Abstract

PURPOSE:To prevent overrun of other I/O data and lowering of efficiency, by operating a response receiving circuit in a fixed period of time after a data request circuit has started its operation. CONSTITUTION:When a data request circuit 5 of I/O 20 has output a request signal to the service-in line 30, FF 7 is set at the same time. FF 7 is a signal which has been delayed by the delay circuit 8, and it is reset after a given period of time. When FF 7 has been reset, a response receiving circuit 6 becomes an operatable status, takes in a data from CPU 10 through the service-out line 40, and transmits it to the data transmitting and receiving control circuit 9. That is to say, since length of the lines 30, 40 is short and even if a response signal comes earlier than expected, it is not received by the response receiving circuit 6, a data on the OUT line 40 is not taken in. Accordingly, the efficiency is not lowered.
JP4666379A 1979-04-18 1979-04-18 Information signal transmitting and receiving device Pending JPS55138942A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4666379A JPS55138942A (en) 1979-04-18 1979-04-18 Information signal transmitting and receiving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4666379A JPS55138942A (en) 1979-04-18 1979-04-18 Information signal transmitting and receiving device

Publications (1)

Publication Number Publication Date
JPS55138942A true JPS55138942A (en) 1980-10-30

Family

ID=12753573

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4666379A Pending JPS55138942A (en) 1979-04-18 1979-04-18 Information signal transmitting and receiving device

Country Status (1)

Country Link
JP (1) JPS55138942A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196333A (en) * 1981-05-26 1982-12-02 Toshiba Corp Interface controlling system
JPS59177647A (en) * 1983-03-28 1984-10-08 Fujitsu Ltd Status confirming control system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57196333A (en) * 1981-05-26 1982-12-02 Toshiba Corp Interface controlling system
JPS59177647A (en) * 1983-03-28 1984-10-08 Fujitsu Ltd Status confirming control system

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