JPS5580140A - Inter-channel communication system - Google Patents

Inter-channel communication system

Info

Publication number
JPS5580140A
JPS5580140A JP15355778A JP15355778A JPS5580140A JP S5580140 A JPS5580140 A JP S5580140A JP 15355778 A JP15355778 A JP 15355778A JP 15355778 A JP15355778 A JP 15355778A JP S5580140 A JPS5580140 A JP S5580140A
Authority
JP
Japan
Prior art keywords
command
channel
circuit
unit
coupler
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15355778A
Other languages
Japanese (ja)
Inventor
Osamu Nakano
Shigeru Kaname
Naoaki Yasumi
Hiroo Fujisaki
Yuichi Narita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Hitachi Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Hitachi Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP15355778A priority Critical patent/JPS5580140A/en
Publication of JPS5580140A publication Critical patent/JPS5580140A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To simplify multiple control over several channel programs by making it possible to execute a channel program while the execution of another program is in process, and also by eliminating the overhead of an interruption at the time of data transfer between data processor.
CONSTITUTION: Between data processors 1 and 2 consisting of CPUs 22 and 21, channel units 3 and 4, and main memory unit 6, inter-channel coupler 5 is arranged and in accordance with input and output commands sent from units 3 and 4, data transfer is carried out. This coupler 5 is provided with circuit 8 on the side of channel coupler A of unit 1 and circuit 18 on the side of channel coupler B of unit 2 and when receiver circuit 9 of A-side circuit 8 receives an input-output command indicating the start of data transfer and a command corresponding to the command is not received from its party side, information is stored in temporary memory unit 13 connected to control circuit 12 to interrupt the execution of the command. When the corresponding command is received from the other processor in succession, the execution of the command is restarted by information stored in unit 13.
COPYRIGHT: (C)1980,JPO&Japio
JP15355778A 1978-12-11 1978-12-11 Inter-channel communication system Pending JPS5580140A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15355778A JPS5580140A (en) 1978-12-11 1978-12-11 Inter-channel communication system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15355778A JPS5580140A (en) 1978-12-11 1978-12-11 Inter-channel communication system

Publications (1)

Publication Number Publication Date
JPS5580140A true JPS5580140A (en) 1980-06-17

Family

ID=15565097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15355778A Pending JPS5580140A (en) 1978-12-11 1978-12-11 Inter-channel communication system

Country Status (1)

Country Link
JP (1) JPS5580140A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190027788A (en) 2017-08-09 2019-03-15 씨케이디 가부시키 가이샤 Flow meter

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20190027788A (en) 2017-08-09 2019-03-15 씨케이디 가부시키 가이샤 Flow meter

Similar Documents

Publication Publication Date Title
JPS5580140A (en) Inter-channel communication system
JPS5745605A (en) Synchronizing method between plural computers
JPS54127239A (en) Input-output control system
JPS5495133A (en) Input/output processing control system
JPS5533243A (en) Data transfer control system
JPS5498143A (en) Communication control system
JPS55146559A (en) Data processing unit
JPS54530A (en) Reference control unit of memory
JPS54153541A (en) Control system for interruption priority
JPS54159104A (en) Communication control unit
JPS5489434A (en) Memory access control processing system
JPS5572245A (en) Data transmission system for crt display unit
JPS5427756A (en) Discriminative switching system of troubled register
JPS5373934A (en) Data exchange control system
JPS57176442A (en) Information processing system
JPS53138240A (en) Data input control system
JPS57143639A (en) Instruction transmitting system
JPS57101928A (en) Interruption controlling system
JPS5553766A (en) Data process system
JPS54101235A (en) Operational processor
JPS5567822A (en) Channel connection system
JPS53114636A (en) Communication line control method and its unit
JPS54155732A (en) Information processing system
JPS55121537A (en) Function test processing system of communication controller
JPS5624626A (en) Data processing system