JPS57161934A - Microprogram controlling system - Google Patents

Microprogram controlling system

Info

Publication number
JPS57161934A
JPS57161934A JP4692881A JP4692881A JPS57161934A JP S57161934 A JPS57161934 A JP S57161934A JP 4692881 A JP4692881 A JP 4692881A JP 4692881 A JP4692881 A JP 4692881A JP S57161934 A JPS57161934 A JP S57161934A
Authority
JP
Japan
Prior art keywords
interruption
mpc
processed
rest part
program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4692881A
Other languages
Japanese (ja)
Other versions
JPH0115094B2 (en
Inventor
Seiichi Inamasu
Toshihiro Sakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4692881A priority Critical patent/JPS57161934A/en
Publication of JPS57161934A publication Critical patent/JPS57161934A/en
Publication of JPH0115094B2 publication Critical patent/JPH0115094B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
    • G06F9/4831Task transfer initiation or dispatching by interrupt, e.g. masked with variable priority

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To reduce the load of a program, by providing a program interrupting means, a start address modifying means, a mask means, and an interrupt factor flag to change optionally the priority level of an interrupt level by the program itself. CONSTITUTION:When vector information of an external interruption A is written in a register 14 and IVM and IM of registers 16 and 18 are not masked, a priority level determining circuit 10 sets an interrupt flag IF. When an interruption B comes during the execution of the interruption A, contents of an MPC are saved to an MPC'' to execute the interruption B. Here, when an interruption C is generated and the processing time for it is long, a microprogram lowers the level of the interruption C and executes interruptions B and A. Information of the interruption B is transferred to the MPC'' from the MPC, and a rest part B' is processed; and when this processing is completed, a rest part A' is processed. After interruption B and A are processed, a rest part C' is accepted as an internal interruption and is processed.
JP4692881A 1981-03-30 1981-03-30 Microprogram controlling system Granted JPS57161934A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4692881A JPS57161934A (en) 1981-03-30 1981-03-30 Microprogram controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4692881A JPS57161934A (en) 1981-03-30 1981-03-30 Microprogram controlling system

Publications (2)

Publication Number Publication Date
JPS57161934A true JPS57161934A (en) 1982-10-05
JPH0115094B2 JPH0115094B2 (en) 1989-03-15

Family

ID=12760988

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4692881A Granted JPS57161934A (en) 1981-03-30 1981-03-30 Microprogram controlling system

Country Status (1)

Country Link
JP (1) JPS57161934A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59103150A (en) * 1982-12-06 1984-06-14 Hitachi Ltd Microprogram control system
JPS61166631A (en) * 1985-01-18 1986-07-28 Oki Electric Ind Co Ltd Microprogram control processor

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5063856A (en) * 1973-10-08 1975-05-30
JPS5189362A (en) * 1975-02-03 1976-08-05
JPS5559555A (en) * 1978-10-27 1980-05-06 Nec Corp High-speed level switching device
JPS5576448A (en) * 1978-12-05 1980-06-09 Nippon Telegr & Teleph Corp <Ntt> Multi-group register control system

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5063856A (en) * 1973-10-08 1975-05-30
JPS5189362A (en) * 1975-02-03 1976-08-05
JPS5559555A (en) * 1978-10-27 1980-05-06 Nec Corp High-speed level switching device
JPS5576448A (en) * 1978-12-05 1980-06-09 Nippon Telegr & Teleph Corp <Ntt> Multi-group register control system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59103150A (en) * 1982-12-06 1984-06-14 Hitachi Ltd Microprogram control system
JPS61166631A (en) * 1985-01-18 1986-07-28 Oki Electric Ind Co Ltd Microprogram control processor
JPH0462093B2 (en) * 1985-01-18 1992-10-05 Oki Electric Ind Co Ltd

Also Published As

Publication number Publication date
JPH0115094B2 (en) 1989-03-15

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