JPS5525192A - Illegal processing system for option instruction - Google Patents

Illegal processing system for option instruction

Info

Publication number
JPS5525192A
JPS5525192A JP9893978A JP9893978A JPS5525192A JP S5525192 A JPS5525192 A JP S5525192A JP 9893978 A JP9893978 A JP 9893978A JP 9893978 A JP9893978 A JP 9893978A JP S5525192 A JPS5525192 A JP S5525192A
Authority
JP
Japan
Prior art keywords
option
instruction
output
control memory
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9893978A
Other languages
Japanese (ja)
Other versions
JPS6051737B2 (en
Inventor
Terumasa Matsuzawa
Tatsuo Ushiki
Tomihide Seo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
NEC Corp
Nippon Telegraph and Telephone Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, NEC Corp, Nippon Telegraph and Telephone Corp, Nippon Electric Co Ltd filed Critical Fujitsu Ltd
Priority to JP53098939A priority Critical patent/JPS6051737B2/en
Publication of JPS5525192A publication Critical patent/JPS5525192A/en
Publication of JPS6051737B2 publication Critical patent/JPS6051737B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To realize an illegal process with small hardware by executing an option instruction microinstruction by the mounting information of a method of indicating whether or not an option control memory card is mounted.
CONSTITUTION: When option control memory card CM'35 is not mounted and an option instruction is assigned, the output of gate A37 is zero and as a CM address from control memory address expansion ROM(MAP)32, the output information of MAP32 is supplied, as it is, to microprogram sequence control circuit SEQ33. Namely, a jump instruction in control memory card CM34 is executed and an illegal instruction processing microprogram is executed by this instruction. Further, when CM'35 is mounted and the option instruction is assigned, the output of gate A37 is one. Therefore, the CM address from MAP32 is qualified by the output of gate A37 and the supplied to SEQ33, so that the microprogram will be executed which is originally of the option instructions.
COPYRIGHT: (C)1980,JPO&Japio
JP53098939A 1978-08-14 1978-08-14 Option instruction illegal processing method Expired JPS6051737B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53098939A JPS6051737B2 (en) 1978-08-14 1978-08-14 Option instruction illegal processing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53098939A JPS6051737B2 (en) 1978-08-14 1978-08-14 Option instruction illegal processing method

Publications (2)

Publication Number Publication Date
JPS5525192A true JPS5525192A (en) 1980-02-22
JPS6051737B2 JPS6051737B2 (en) 1985-11-15

Family

ID=14233080

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53098939A Expired JPS6051737B2 (en) 1978-08-14 1978-08-14 Option instruction illegal processing method

Country Status (1)

Country Link
JP (1) JPS6051737B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57130148A (en) * 1981-02-02 1982-08-12 Oki Electric Ind Co Ltd Microprogram control system
JPS60193046A (en) * 1984-03-14 1985-10-01 Fujitsu Ltd Detecting system for instruction exception

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57130148A (en) * 1981-02-02 1982-08-12 Oki Electric Ind Co Ltd Microprogram control system
JPS60193046A (en) * 1984-03-14 1985-10-01 Fujitsu Ltd Detecting system for instruction exception
JPH0258648B2 (en) * 1984-03-14 1990-12-10 Fujitsu Ltd

Also Published As

Publication number Publication date
JPS6051737B2 (en) 1985-11-15

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