JPS578854A - Interruption information control system - Google Patents

Interruption information control system

Info

Publication number
JPS578854A
JPS578854A JP8238380A JP8238380A JPS578854A JP S578854 A JPS578854 A JP S578854A JP 8238380 A JP8238380 A JP 8238380A JP 8238380 A JP8238380 A JP 8238380A JP S578854 A JPS578854 A JP S578854A
Authority
JP
Japan
Prior art keywords
circuit
interruption
interruption information
held
information
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8238380A
Other languages
Japanese (ja)
Inventor
Fumio Hoshi
Masao Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP8238380A priority Critical patent/JPS578854A/en
Publication of JPS578854A publication Critical patent/JPS578854A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)

Abstract

PURPOSE:To read interruption information freely by equipping an interruption level informing circuit which outputs the interruption information, held in an interruption processing level holding circuit, to an internal arithmetic bus. CONSTITUTION:An interruption, once caused, is detected by an interrupting circuit 5 and held in an interruption processing level holding circuit 6. The interruption information held in the circuit 6 is sent to an instruction executing circuit 1 and also transmitted to an interruption processing level informing circuit 9. The circuit 9 outputs the contents of the circuit 6 to an internal arithmetic bus 8 to hold the interruption information in a general register, etc. Then, a program operates this general register to read the interruption information.
JP8238380A 1980-06-18 1980-06-18 Interruption information control system Pending JPS578854A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8238380A JPS578854A (en) 1980-06-18 1980-06-18 Interruption information control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8238380A JPS578854A (en) 1980-06-18 1980-06-18 Interruption information control system

Publications (1)

Publication Number Publication Date
JPS578854A true JPS578854A (en) 1982-01-18

Family

ID=13773054

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8238380A Pending JPS578854A (en) 1980-06-18 1980-06-18 Interruption information control system

Country Status (1)

Country Link
JP (1) JPS578854A (en)

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