JPS5694444A - Information processing device - Google Patents
Information processing deviceInfo
- Publication number
- JPS5694444A JPS5694444A JP17098779A JP17098779A JPS5694444A JP S5694444 A JPS5694444 A JP S5694444A JP 17098779 A JP17098779 A JP 17098779A JP 17098779 A JP17098779 A JP 17098779A JP S5694444 A JPS5694444 A JP S5694444A
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- flags
- registers
- start position
- time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
Abstract
PURPOSE: To process the branch instruction in a high speed, by providing the index indicating the instruction start position in the instruction buffer for every instruction buffer and by decoding the instructions after the current instruction position and by looking ahead the instruction for the branch instruction.
CONSTITUTION: Instruction buffer registers 1W4 and flags 5W8 indicating start positions of these registers 1W4 are provided. Further, flag 9 which anticipates the start position of the instruction read from the memory and pointers 10W12 which indicate the position of register 1W4 from which the instruction is feteched are provided. Each time the instruction word is read from the memory, a new instruction start position is detected in succeeding instruction start position detecting circuit 13 according to the decode result of a part of the instruction word, following values of flags 5W8 at this time, and the situation of position flags 5W8 in registers 1W4, and is set to corresponding flags 5W8 in register 1W4 through instruction position detecting circuit 14. At the branch instruction time, the instruction is feteched and executed in a high speed by pointers 10W12 and flags 5W8 in registers 1W4.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54170987A JPS586972B2 (en) | 1979-12-28 | 1979-12-28 | information processing equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54170987A JPS586972B2 (en) | 1979-12-28 | 1979-12-28 | information processing equipment |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5694444A true JPS5694444A (en) | 1981-07-30 |
JPS586972B2 JPS586972B2 (en) | 1983-02-07 |
Family
ID=15915018
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54170987A Expired JPS586972B2 (en) | 1979-12-28 | 1979-12-28 | information processing equipment |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS586972B2 (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0235525A (en) * | 1988-07-25 | 1990-02-06 | Fujitsu Ltd | Instruction fetch control method |
JPH07239780A (en) * | 1994-01-06 | 1995-09-12 | Motohiro Kurisu | One-clock variable length instruction execution process type instruction read computer |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4979744A (en) * | 1972-12-08 | 1974-08-01 | ||
JPS49123545A (en) * | 1973-03-30 | 1974-11-26 | ||
JPS5145946A (en) * | 1974-10-17 | 1976-04-19 | Fujitsu Ltd | DEETASHORISHI SUTEMU |
JPS51138355A (en) * | 1975-05-26 | 1976-11-29 | Hitachi Ltd | Processing apparatus with a high speed branching feature |
-
1979
- 1979-12-28 JP JP54170987A patent/JPS586972B2/en not_active Expired
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4979744A (en) * | 1972-12-08 | 1974-08-01 | ||
JPS49123545A (en) * | 1973-03-30 | 1974-11-26 | ||
JPS5145946A (en) * | 1974-10-17 | 1976-04-19 | Fujitsu Ltd | DEETASHORISHI SUTEMU |
JPS51138355A (en) * | 1975-05-26 | 1976-11-29 | Hitachi Ltd | Processing apparatus with a high speed branching feature |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0235525A (en) * | 1988-07-25 | 1990-02-06 | Fujitsu Ltd | Instruction fetch control method |
JPH07239780A (en) * | 1994-01-06 | 1995-09-12 | Motohiro Kurisu | One-clock variable length instruction execution process type instruction read computer |
Also Published As
Publication number | Publication date |
---|---|
JPS586972B2 (en) | 1983-02-07 |
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