JPS57159038A - Forming method for v-shaped isolation region - Google Patents

Forming method for v-shaped isolation region

Info

Publication number
JPS57159038A
JPS57159038A JP4380081A JP4380081A JPS57159038A JP S57159038 A JPS57159038 A JP S57159038A JP 4380081 A JP4380081 A JP 4380081A JP 4380081 A JP4380081 A JP 4380081A JP S57159038 A JPS57159038 A JP S57159038A
Authority
JP
Japan
Prior art keywords
film
groove
sio2
si2n4
covered
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4380081A
Other languages
English (en)
Other versions
JPS6359537B2 (ja
Inventor
Takeshi Fukuda
Kazuo Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP4380081A priority Critical patent/JPS57159038A/ja
Publication of JPS57159038A publication Critical patent/JPS57159038A/ja
Publication of JPS6359537B2 publication Critical patent/JPS6359537B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/763Polycrystalline semiconductor regions
JP4380081A 1981-03-25 1981-03-25 Forming method for v-shaped isolation region Granted JPS57159038A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4380081A JPS57159038A (en) 1981-03-25 1981-03-25 Forming method for v-shaped isolation region

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4380081A JPS57159038A (en) 1981-03-25 1981-03-25 Forming method for v-shaped isolation region

Publications (2)

Publication Number Publication Date
JPS57159038A true JPS57159038A (en) 1982-10-01
JPS6359537B2 JPS6359537B2 (ja) 1988-11-21

Family

ID=12673816

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4380081A Granted JPS57159038A (en) 1981-03-25 1981-03-25 Forming method for v-shaped isolation region

Country Status (1)

Country Link
JP (1) JPS57159038A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS609138A (ja) * 1983-02-25 1985-01-18 Fujitsu Ltd 半導体装置の製造方法
US5342792A (en) * 1986-03-07 1994-08-30 Canon Kabushiki Kaisha Method of manufacturing semiconductor memory element
US6960818B1 (en) * 1997-12-30 2005-11-01 Siemens Aktiengesellschaft Recessed shallow trench isolation structure nitride liner and method for making same
US8331385B2 (en) 2004-08-30 2012-12-11 Qualcomm Incorporated Method and apparatus for flexible packet selection in a wireless communication system

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0718661U (ja) * 1993-09-17 1995-04-04 株式会社タイガークラウン 商品陳列具
CN109461767B (zh) * 2018-10-25 2022-03-29 深圳市金鑫城纸品有限公司 一种超结结构的制作方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS609138A (ja) * 1983-02-25 1985-01-18 Fujitsu Ltd 半導体装置の製造方法
US5342792A (en) * 1986-03-07 1994-08-30 Canon Kabushiki Kaisha Method of manufacturing semiconductor memory element
US6960818B1 (en) * 1997-12-30 2005-11-01 Siemens Aktiengesellschaft Recessed shallow trench isolation structure nitride liner and method for making same
US8331385B2 (en) 2004-08-30 2012-12-11 Qualcomm Incorporated Method and apparatus for flexible packet selection in a wireless communication system

Also Published As

Publication number Publication date
JPS6359537B2 (ja) 1988-11-21

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