JPS57157594A - Method of producing thin film conductor path including no noble metal - Google Patents

Method of producing thin film conductor path including no noble metal

Info

Publication number
JPS57157594A
JPS57157594A JP57032184A JP3218482A JPS57157594A JP S57157594 A JPS57157594 A JP S57157594A JP 57032184 A JP57032184 A JP 57032184A JP 3218482 A JP3218482 A JP 3218482A JP S57157594 A JPS57157594 A JP S57157594A
Authority
JP
Japan
Prior art keywords
thin film
noble metal
path including
conductor path
film conductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57032184A
Other languages
English (en)
Other versions
JPH0235475B2 (ja
Inventor
Gurewaaru Fuirindaa
Raindoru Uerunaa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Schuckertwerke AG
Siemens AG
Original Assignee
Siemens Schuckertwerke AG
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Schuckertwerke AG, Siemens AG filed Critical Siemens Schuckertwerke AG
Publication of JPS57157594A publication Critical patent/JPS57157594A/ja
Publication of JPH0235475B2 publication Critical patent/JPH0235475B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/24—Reinforcing the conductive pattern
    • H05K3/244—Finish plating of conductors, especially of copper conductors, e.g. for pads or lands
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/01—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate comprising only passive thin-film or thick-film elements formed on a common insulating substrate
    • H01L27/016—Thin-film circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP57032184A 1981-03-02 1982-03-01 Method of producing thin film conductor path including no noble metal Granted JPS57157594A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19813107943 DE3107943A1 (de) 1981-03-02 1981-03-02 Verfahren zur herstellung von loetbaren und temperfaehigen edelmetallfreien duennschichtleiterbahnen

Publications (2)

Publication Number Publication Date
JPS57157594A true JPS57157594A (en) 1982-09-29
JPH0235475B2 JPH0235475B2 (ja) 1990-08-10

Family

ID=6126178

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57032184A Granted JPS57157594A (en) 1981-03-02 1982-03-01 Method of producing thin film conductor path including no noble metal

Country Status (4)

Country Link
US (1) US4372809A (ja)
EP (1) EP0060436A1 (ja)
JP (1) JPS57157594A (ja)
DE (1) DE3107943A1 (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376190A (ja) * 1989-08-18 1991-04-02 Fujitsu Ltd 薄膜回路基板
JP2014039026A (ja) * 2012-07-31 2014-02-27 General Electric Co <Ge> 電子回路板、アセンブリおよびその関係する方法

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4482913A (en) * 1982-02-24 1984-11-13 Westinghouse Electric Corp. Semiconductor device soldered to a graphite substrate
US4620215A (en) * 1982-04-16 1986-10-28 Amdahl Corporation Integrated circuit packaging systems with double surface heat dissipation
DE3312725A1 (de) * 1983-04-08 1984-10-11 Siemens AG, 1000 Berlin und 8000 München Bond- und loetbare duennschichtleiterbahnen mit durchkontaktierungen
JPS60184092A (ja) 1984-03-01 1985-09-19 Kao Corp リン酸エステルおよびその製法
DE3438028A1 (de) * 1984-10-17 1986-04-24 Siemens AG, 1000 Berlin und 8000 München Duennfilmschaltungen mit integrierten nickelchrom-widerstaenden
US4716049A (en) * 1985-12-20 1987-12-29 Hughes Aircraft Company Compressive pedestal for microminiature connections
US5138431A (en) * 1990-01-31 1992-08-11 Vlsi Technology, Inc. Lead and socket structures with reduced self-inductance
JPH03233972A (ja) * 1990-02-08 1991-10-17 Matsushita Electron Corp 半導体装置用電極およびその製造方法
US5126283A (en) * 1990-05-21 1992-06-30 Motorola, Inc. Process for the selective encapsulation of an electrically conductive structure in a semiconductor device
US5164332A (en) * 1991-03-15 1992-11-17 Microelectronics And Computer Technology Corporation Diffusion barrier for copper features
JP3106786B2 (ja) * 1993-08-26 2000-11-06 松下電器産業株式会社 半導体装置およびその製造方法
JP2000114302A (ja) * 1998-10-08 2000-04-21 Fuji Electric Co Ltd 半導体装置
US6347175B1 (en) 1999-07-14 2002-02-12 Corning Incorporated Solderable thin film
DE19945914C1 (de) * 1999-09-24 2001-08-30 Siemens Ag Verfahren zur Erzeugung von präzisen Lötflächen auf einem Schaltungsträger, insbesondere Dünnfilm-Substrat
DE10238816B4 (de) * 2002-08-23 2008-01-10 Qimonda Ag Verfahren zur Herstellung von Anschlussbereichen einer integrierten Schaltung und integrierte Schaltung mit Anschlussbereichen
DE10241589B4 (de) * 2002-09-05 2007-11-22 Qimonda Ag Verfahren zur Lötstopp-Strukturierung von Erhebungen auf Wafern
DE10320561B4 (de) 2003-05-07 2007-12-06 Qimonda Ag Verfahren zur Herstellung einer leitfähigen Verbindung zwischen einem Halbleiterchip und einer äußeren Leiterstruktur
KR101934312B1 (ko) * 2013-07-29 2019-01-02 훼로코오포레이션 전도성 트레이스를 형성하는 방법
TWI719241B (zh) * 2017-08-18 2021-02-21 景碩科技股份有限公司 可做電性測試的多層電路板及其製法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS525470A (en) * 1975-07-01 1977-01-17 Sumitomo Bakelite Co Method of manufacturing printed circuit substrate
JPS5533196A (en) * 1979-08-20 1980-03-08 Showa Electric Wire & Cable Co Ltd Splicing method of optical fiber cable

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1790013B1 (de) * 1968-08-27 1971-11-25 Siemens Ag Elektrische duennschichtschaltung
DE2108730A1 (en) * 1970-03-06 1971-09-16 Motorola Inc Integrated hybrid circuit
DD102035A1 (ja) * 1973-02-02 1973-11-20
US3881884A (en) * 1973-10-12 1975-05-06 Ibm Method for the formation of corrosion resistant electronic interconnections
DE2554691C2 (de) * 1974-12-10 1982-11-18 Western Electric Co., Inc., 10038 New York, N.Y. Verfahren zum Herstellen elektrischer Leiter auf einem isolierenden Substrat und danach hergestellte Dünnschichtschaltung
DE2522944C3 (de) * 1975-05-23 1980-11-27 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung einer elektrischen Dünnfilmschaltung
DE2550512A1 (de) * 1975-11-11 1977-05-12 Bosch Gmbh Robert Verfahren zur herstellung einer metallisierung auf einem substrat
DE2606086C3 (de) * 1976-02-16 1980-08-14 Bernd Dr.-Ing. 7250 Leonberg Kaiser Herstellung von integrierten Dünnschichtschaltungen aus mit dünnen Schichten mehrlagig beschichteter Unterlage

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS525470A (en) * 1975-07-01 1977-01-17 Sumitomo Bakelite Co Method of manufacturing printed circuit substrate
JPS5533196A (en) * 1979-08-20 1980-03-08 Showa Electric Wire & Cable Co Ltd Splicing method of optical fiber cable

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376190A (ja) * 1989-08-18 1991-04-02 Fujitsu Ltd 薄膜回路基板
JP2014039026A (ja) * 2012-07-31 2014-02-27 General Electric Co <Ge> 電子回路板、アセンブリおよびその関係する方法

Also Published As

Publication number Publication date
DE3107943C2 (ja) 1990-10-31
JPH0235475B2 (ja) 1990-08-10
DE3107943A1 (de) 1982-09-16
US4372809A (en) 1983-02-08
EP0060436A1 (de) 1982-09-22

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