JPS57155768A - Semiconductor integrated circuit device - Google Patents

Semiconductor integrated circuit device

Info

Publication number
JPS57155768A
JPS57155768A JP56040324A JP4032481A JPS57155768A JP S57155768 A JPS57155768 A JP S57155768A JP 56040324 A JP56040324 A JP 56040324A JP 4032481 A JP4032481 A JP 4032481A JP S57155768 A JPS57155768 A JP S57155768A
Authority
JP
Japan
Prior art keywords
type
regions
sio2 film
nmos
approx
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56040324A
Other languages
Japanese (ja)
Inventor
Yasunobu Osa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56040324A priority Critical patent/JPS57155768A/en
Publication of JPS57155768A publication Critical patent/JPS57155768A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To obtain a CMOS IC with the effective coexistences of MOS elements for high and low voltage, by forming a plurality of p type well regions with different depths on the main surface of an N type semiconductor substrate with elements mounted on each of regions. CONSTITUTION:A p type impurity is ion-implanted with an SiO2 film pattern 31 formed on a main surface of the N type substrate 1 as a mask to form the deep well region with depth of approx. 7mum by drive diffusion. Next, another part of the SiO2 film 31 is etched to form the shallow well region with depth of approx. 3mum by ion implantation and drive diffusion. Subsequently, a field SiO2 film 20 is grown with an Si3N4 film 33 as a mask to isolate each of element regions. For the rest, a PMOS is formed on the N type substrate, NMOS for low voltage on the shallow p type well and NMOS for high voltage on the deep p type well to obtain a CMOS IC.
JP56040324A 1981-03-23 1981-03-23 Semiconductor integrated circuit device Pending JPS57155768A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56040324A JPS57155768A (en) 1981-03-23 1981-03-23 Semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56040324A JPS57155768A (en) 1981-03-23 1981-03-23 Semiconductor integrated circuit device

Publications (1)

Publication Number Publication Date
JPS57155768A true JPS57155768A (en) 1982-09-25

Family

ID=12577422

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56040324A Pending JPS57155768A (en) 1981-03-23 1981-03-23 Semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS57155768A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5835978A (en) * 1981-08-28 1983-03-02 Fujitsu Ltd Semiconductor device
JPS59135758A (en) * 1983-01-24 1984-08-04 Seiko Epson Corp Semiconductor device
WO1985005736A1 (en) * 1984-05-25 1985-12-19 American Microsystems, Inc. Tri-well cmos technology
JPS6114744A (en) * 1984-06-29 1986-01-22 Fujitsu Ltd Semiconductor device
JPS63216370A (en) * 1987-03-05 1988-09-08 Toshiba Corp Semiconductor device
CN116153934A (en) * 2023-04-20 2023-05-23 长鑫存储技术有限公司 Semiconductor structure and preparation method thereof

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5835978A (en) * 1981-08-28 1983-03-02 Fujitsu Ltd Semiconductor device
JPS59135758A (en) * 1983-01-24 1984-08-04 Seiko Epson Corp Semiconductor device
WO1985005736A1 (en) * 1984-05-25 1985-12-19 American Microsystems, Inc. Tri-well cmos technology
JPS6114744A (en) * 1984-06-29 1986-01-22 Fujitsu Ltd Semiconductor device
JPS63216370A (en) * 1987-03-05 1988-09-08 Toshiba Corp Semiconductor device
JPH0413861B2 (en) * 1987-03-05 1992-03-11 Tokyo Shibaura Electric Co
CN116153934A (en) * 2023-04-20 2023-05-23 长鑫存储技术有限公司 Semiconductor structure and preparation method thereof
CN116153934B (en) * 2023-04-20 2023-06-27 长鑫存储技术有限公司 Semiconductor structure and preparation method thereof

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