JPS57148374A - Manufacture of mos type semiconductor device - Google Patents

Manufacture of mos type semiconductor device

Info

Publication number
JPS57148374A
JPS57148374A JP56033428A JP3342881A JPS57148374A JP S57148374 A JPS57148374 A JP S57148374A JP 56033428 A JP56033428 A JP 56033428A JP 3342881 A JP3342881 A JP 3342881A JP S57148374 A JPS57148374 A JP S57148374A
Authority
JP
Japan
Prior art keywords
region
electrode
pattern
semiconductor device
mask
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56033428A
Other languages
Japanese (ja)
Inventor
Yutaka Hatano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56033428A priority Critical patent/JPS57148374A/en
Publication of JPS57148374A publication Critical patent/JPS57148374A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)

Abstract

PURPOSE:To contrive improvement of high frequency characteristics by suppressing the punch-through to the substrate side of an Al wiring for the subject semiconductor device by a method wherein a drain region which is shallower than a source region is formed. CONSTITUTION:After a field oxide film 2 has been formed on a p type Si substrate 1, a gate oxide film 3 is formed, and a gate electrode 4 is formed through the intermediary of the film 3. Then, after a resist pattern 5 has been formed, an n<+> type source region is formed by implanting p, for example, using the resist pattern 5 and the electrode 4 as a mask. Then, after removal of the pattern 5 and a resistor pattern 7 has been formed, an n<+> drain region 8 is formed by implanting impurities, having the diffusion coefficient smaller than that of p such as As, for example, using the pattern 7 and the electrode 4 as a mask. Through these procedures, as the region 8 is formed shallower than the region 6 and the infiltration to underneath the electrode 4 on the region 8 is suppressed, the overlapping capacitance between the electrode 4 and the region 8 is reduced. Accordingly, the input capacitance is reduced effectively due to decreased mirror effect, thereby enabling to accomplish excellent high frequency characteristics.
JP56033428A 1981-03-09 1981-03-09 Manufacture of mos type semiconductor device Pending JPS57148374A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56033428A JPS57148374A (en) 1981-03-09 1981-03-09 Manufacture of mos type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56033428A JPS57148374A (en) 1981-03-09 1981-03-09 Manufacture of mos type semiconductor device

Publications (1)

Publication Number Publication Date
JPS57148374A true JPS57148374A (en) 1982-09-13

Family

ID=12386274

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56033428A Pending JPS57148374A (en) 1981-03-09 1981-03-09 Manufacture of mos type semiconductor device

Country Status (1)

Country Link
JP (1) JPS57148374A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0568422A (en) * 1991-09-11 1993-03-23 Ochiai Hamono Kogyo Kk Method for keeping machine body horizontal in automatic tea leaf plucker
US6022780A (en) * 1996-12-06 2000-02-08 Nec Corporation Semiconductor device having source and drain regions different in depth from each other and process of fabrication thereof
US7622343B2 (en) 1992-10-30 2009-11-24 Semiconductor Energy Laboratory Co., Ltd. Laser processing method, method for forming a flash memory, insulated gate semiconductor device and method for forming the same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50156377A (en) * 1974-06-05 1975-12-17

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50156377A (en) * 1974-06-05 1975-12-17

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0568422A (en) * 1991-09-11 1993-03-23 Ochiai Hamono Kogyo Kk Method for keeping machine body horizontal in automatic tea leaf plucker
US7622343B2 (en) 1992-10-30 2009-11-24 Semiconductor Energy Laboratory Co., Ltd. Laser processing method, method for forming a flash memory, insulated gate semiconductor device and method for forming the same
US6022780A (en) * 1996-12-06 2000-02-08 Nec Corporation Semiconductor device having source and drain regions different in depth from each other and process of fabrication thereof

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