JPS57147270A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57147270A JPS57147270A JP56031699A JP3169981A JPS57147270A JP S57147270 A JPS57147270 A JP S57147270A JP 56031699 A JP56031699 A JP 56031699A JP 3169981 A JP3169981 A JP 3169981A JP S57147270 A JPS57147270 A JP S57147270A
- Authority
- JP
- Japan
- Prior art keywords
- type
- region
- inverting input
- substrate
- mosfet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0255—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
Abstract
PURPOSE:To prevent the damage of a semiconductor integrated arithmetic amplifier by adding an electrostatic destruction preventing device having a P-N junction to an inverting input terminal and not adding a P-N junction to the non- inverting input terminal. CONSTITUTION:A semiconductor substrate having a P type Si substrate 1, an N type epitaxial layer 2, an N<+> type high density region 3 formed between the substrate 1 and the layer 2, a P type insulating region 4 for electrically isolating between FETs formed later or an element such as resistors, and an SiO2 film 5 for covering the surface is obtained. Then, the source 6, drain 7 and a protecting diode 8 of an MOSFET are simultaneously formed with P type impurity, and a back gate contact N<+> region 9 and a gate oxidized film 10 are further obtained. Then, a wire is laid by a deposition technique and a photoresist treatment. At this time the P type region 8 of the protecting diode is connected to the gate wiring of the MOSFET at the inverting input side.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56031699A JPS57147270A (en) | 1981-03-05 | 1981-03-05 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56031699A JPS57147270A (en) | 1981-03-05 | 1981-03-05 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57147270A true JPS57147270A (en) | 1982-09-11 |
Family
ID=12338316
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56031699A Pending JPS57147270A (en) | 1981-03-05 | 1981-03-05 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57147270A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5324982A (en) * | 1985-09-25 | 1994-06-28 | Hitachi, Ltd. | Semiconductor memory device having bipolar transistor and structure to avoid soft error |
-
1981
- 1981-03-05 JP JP56031699A patent/JPS57147270A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5324982A (en) * | 1985-09-25 | 1994-06-28 | Hitachi, Ltd. | Semiconductor memory device having bipolar transistor and structure to avoid soft error |
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