JPS57141157A - Clock regenerating circuit - Google Patents

Clock regenerating circuit

Info

Publication number
JPS57141157A
JPS57141157A JP56027501A JP2750181A JPS57141157A JP S57141157 A JPS57141157 A JP S57141157A JP 56027501 A JP56027501 A JP 56027501A JP 2750181 A JP2750181 A JP 2750181A JP S57141157 A JPS57141157 A JP S57141157A
Authority
JP
Japan
Prior art keywords
switch
circuit
outputs
level
digital pll
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56027501A
Other languages
English (en)
Japanese (ja)
Other versions
JPS639704B2 (enrdf_load_stackoverflow
Inventor
Akihide Nishiyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56027501A priority Critical patent/JPS57141157A/ja
Publication of JPS57141157A publication Critical patent/JPS57141157A/ja
Publication of JPS639704B2 publication Critical patent/JPS639704B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00—Arrangements for synchronising receiver with transmitter
    • H04L7/02—Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/027—Speed or phase control by the received code signals, the signals containing no special synchronisation information extracting the synchronising or clock signal from the received signal spectrum, e.g. by using a resonant or bandpass circuit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
JP56027501A 1981-02-26 1981-02-26 Clock regenerating circuit Granted JPS57141157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56027501A JPS57141157A (en) 1981-02-26 1981-02-26 Clock regenerating circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56027501A JPS57141157A (en) 1981-02-26 1981-02-26 Clock regenerating circuit

Publications (2)

Publication Number Publication Date
JPS57141157A true JPS57141157A (en) 1982-09-01
JPS639704B2 JPS639704B2 (enrdf_load_stackoverflow) 1988-03-01

Family

ID=12222889

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56027501A Granted JPS57141157A (en) 1981-02-26 1981-02-26 Clock regenerating circuit

Country Status (1)

Country Link
JP (1) JPS57141157A (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7161986B2 (en) 2001-12-05 2007-01-09 Nec Corporation Data transmission system and data transmitter/receiver for use therein, and method thereof

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7161986B2 (en) 2001-12-05 2007-01-09 Nec Corporation Data transmission system and data transmitter/receiver for use therein, and method thereof

Also Published As

Publication number Publication date
JPS639704B2 (enrdf_load_stackoverflow) 1988-03-01

Similar Documents

Publication Publication Date Title
JPS5720052A (en) Input data synchronizing circuit
US5121070A (en) Phase demodulator for psk-modulated signals
JPS57141157A (en) Clock regenerating circuit
JPS57115076A (en) Synchronous detection type carrier regenerating circuit of medium velocity facsimile
US3916084A (en) Compact-bi-phase pulse coded modulation decoder
JP2841935B2 (ja) 位相復調器
JPS5635551A (en) Digital phase detecting system
JPS5530232A (en) Demodulator on n-phase phase shift keying system
JPS558144A (en) Analog-digital conversion circuit
JPS55127885A (en) Method for detecting missing phase in output of three- phase inverter
JPS5593528A (en) Data demodulation unit
JPS5520074A (en) Digital phase synchronous circuit
JPS5526471A (en) Power failure detection circuit
JPS5481062A (en) Relay
JPS5575386A (en) Detector circuit for vertical synchronous pulse
JPS57131143A (en) Timing extracting circuit
JPS57143963A (en) Data detector
JPS54122943A (en) Synchronizing unit
JPS52145076A (en) Phase discriminating circuit
JPS5466062A (en) Clock synchronous circuit
JPS5479017A (en) Sector clock generating system
JPS5497762A (en) Thyristor output detector
JPS5582974A (en) Phase synchronizing system
JPS5382154A (en) Digital fm demodulating system
JPS5480030A (en) Process circuit for carrier chrominance signal