JPS5497310A - Phase synchronizing circuit - Google Patents

Phase synchronizing circuit

Info

Publication number
JPS5497310A
JPS5497310A JP489878A JP489878A JPS5497310A JP S5497310 A JPS5497310 A JP S5497310A JP 489878 A JP489878 A JP 489878A JP 489878 A JP489878 A JP 489878A JP S5497310 A JPS5497310 A JP S5497310A
Authority
JP
Japan
Prior art keywords
phase
output
signal
frequency
phase synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP489878A
Other languages
Japanese (ja)
Other versions
JPS5944813B2 (en
Inventor
Osamu Ichiyoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP53004898A priority Critical patent/JPS5944813B2/en
Publication of JPS5497310A publication Critical patent/JPS5497310A/en
Publication of JPS5944813B2 publication Critical patent/JPS5944813B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/10—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range
    • H03L7/113—Details of the phase-locked loop for assuring initial synchronisation or for broadening the capture range using frequency discriminator

Landscapes

  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To allow a phase synchronizing circuit to reach a phase-synchronizing state by reducing the input-output frequency difference of the phase synchronizing circuit by providing a frequency discriminating function even in an asynchronizing state. CONSTITUTION:In case that an output singal has frequency error We as compared with an input signal. sample holding type gate circuit 107 closes while signal 7 is at a positive potential, and then outputs input signal 6 as it is. When signal 7 is at a negative potential, however, the gate opens and holds the voltage, so that the waveform of output signal 8(c) can be obtained. With We less than zero, the waveform of (f) can be obtained through the same operation. With We greater than zero, on the other hand, the DC component of the output of gate 107 is applied to oscillator VCO101 after passing through low-pass filter 108, thereby reducing We by rising the output frequency of VCO101 gradually. When We is within the lead-in range of the synchronous frequency of phase phase synchronizing circuit PLL, PLL is in the phase synchronizing state. Further, operation with We less than zero is the same.
JP53004898A 1978-01-19 1978-01-19 phase synchronized circuit Expired JPS5944813B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53004898A JPS5944813B2 (en) 1978-01-19 1978-01-19 phase synchronized circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53004898A JPS5944813B2 (en) 1978-01-19 1978-01-19 phase synchronized circuit

Publications (2)

Publication Number Publication Date
JPS5497310A true JPS5497310A (en) 1979-08-01
JPS5944813B2 JPS5944813B2 (en) 1984-11-01

Family

ID=11596481

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53004898A Expired JPS5944813B2 (en) 1978-01-19 1978-01-19 phase synchronized circuit

Country Status (1)

Country Link
JP (1) JPS5944813B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58500189A (en) * 1981-03-04 1983-02-03 モトロ−ラ．インコ−ポレ−テツド Phase-locked loop device with improved phase locking
JPS60248022A (en) * 1984-05-23 1985-12-07 Matsushita Electric Ind Co Ltd Frequency synthesizer

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6364844U (en) * 1986-10-17 1988-04-28

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58500189A (en) * 1981-03-04 1983-02-03 モトロ−ラ．インコ−ポレ−テツド Phase-locked loop device with improved phase locking
JPH0472412B2 (en) * 1981-03-04 1992-11-18 Motorola Inc
JPS60248022A (en) * 1984-05-23 1985-12-07 Matsushita Electric Ind Co Ltd Frequency synthesizer
JPH0472413B2 (en) * 1984-05-23 1992-11-18 Matsushita Electric Ind Co Ltd

Also Published As

Publication number Publication date
JPS5944813B2 (en) 1984-11-01

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