JPS5643832A - Phase synchronizing circuit - Google Patents
Phase synchronizing circuitInfo
- Publication number
- JPS5643832A JPS5643832A JP11793579A JP11793579A JPS5643832A JP S5643832 A JPS5643832 A JP S5643832A JP 11793579 A JP11793579 A JP 11793579A JP 11793579 A JP11793579 A JP 11793579A JP S5643832 A JPS5643832 A JP S5643832A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- signal
- phase
- subtraction
- superposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 abstract 1
- 230000000295 complement effect Effects 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To obtain a stable synchronizing circuit of high precision by digitizing the operations of a phase comparing circuit and voltage control oscillator. CONSTITUTION:On input signal fi, superposed DC voltage E0 greater than its amplitude is superposed by DC superposing circuit 1 to obtain a unipolar signal, which is applied to A/D converting circuit 2. As for the output of circuit 2, the antilogarithm and complement are alternated by addition-subtraction alternating circuit 3 in every half period of local signal f0 and addition and subtraction are performed by the following integrating circuit 4 in every half period. Input signal fi is integrated according to the expression (theta is the phase difference between signals fi and f0 and (omega) is the frequency of fi). Then, a pulse is generated at the conversion point of signal f0 by differentiating circuit 9 so that the output of circuit 4 will be zero. Then, the contents of circuit 4 are transferred to latch circuit 5 to control pulse rate varying circuit 7 on the bais of the contents, and consequently an input to frequency dividing circuit 8 is adjusted to control the phase of signal f0.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54117935A JPS5931256B2 (en) | 1979-09-17 | 1979-09-17 | phase synchronized circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP54117935A JPS5931256B2 (en) | 1979-09-17 | 1979-09-17 | phase synchronized circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5643832A true JPS5643832A (en) | 1981-04-22 |
JPS5931256B2 JPS5931256B2 (en) | 1984-08-01 |
Family
ID=14723845
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP54117935A Expired JPS5931256B2 (en) | 1979-09-17 | 1979-09-17 | phase synchronized circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5931256B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01130860A (en) * | 1987-11-13 | 1989-05-23 | Daido Steel Co Ltd | Manufacture of stainless steel cast billet for forging |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62232984A (en) * | 1986-04-01 | 1987-10-13 | アマダ エンジニアリング アンド サ−ビス カンパニ− インコ−ポレ−テツド | Iris changer of laser resonator |
-
1979
- 1979-09-17 JP JP54117935A patent/JPS5931256B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01130860A (en) * | 1987-11-13 | 1989-05-23 | Daido Steel Co Ltd | Manufacture of stainless steel cast billet for forging |
Also Published As
Publication number | Publication date |
---|---|
JPS5931256B2 (en) | 1984-08-01 |
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