JPS57143963A - Data detector - Google Patents
Data detectorInfo
- Publication number
- JPS57143963A JPS57143963A JP56029509A JP2950981A JPS57143963A JP S57143963 A JPS57143963 A JP S57143963A JP 56029509 A JP56029509 A JP 56029509A JP 2950981 A JP2950981 A JP 2950981A JP S57143963 A JPS57143963 A JP S57143963A
- Authority
- JP
- Japan
- Prior art keywords
- data
- clock
- accurately
- mmv
- multivibrator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/20—Repeater circuits; Relay circuits
- H04L25/24—Relay circuits using discharge tubes or semiconductor devices
- H04L25/242—Relay circuits using discharge tubes or semiconductor devices with retiming
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Dc Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To accurately extracting the data of a timing regenerating circuit, and to detect high-speed data accurately with a simple constitution by using a monostable multivibrator, and performing accurate switching operation to the high-speed data signal. CONSTITUTION:Received data from a data input terminal DT is applied to the data terminal D of a delay type flip-flop D-FF as a timing regenerating circuit. A clock signal CLK extracted from the received data is applied to a monostable multivibrator MMV having variable operation time, and the output of the multivibrator MMV is applied to the clock terminal C of the D-FF through a phase inverting circuit INV. Then, the time constant CR of the multivibrator MMV is adjusted for the timing adjustment of the clock CLK, and thus the operation of the D-FF is made to correspond to the high-speed received data, sampling the data accurately. When the input data is 180 deg. out of phase with the clock CLK, the clock CLK is inverted by the phase inverting circuit IVT before it is applied to the multivibrator MMV.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56029509A JPS57143963A (en) | 1981-03-02 | 1981-03-02 | Data detector |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56029509A JPS57143963A (en) | 1981-03-02 | 1981-03-02 | Data detector |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57143963A true JPS57143963A (en) | 1982-09-06 |
Family
ID=12278059
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56029509A Pending JPS57143963A (en) | 1981-03-02 | 1981-03-02 | Data detector |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57143963A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62112435A (en) * | 1985-11-12 | 1987-05-23 | Nec Corp | Signal decoder |
JPH07221800A (en) * | 1994-02-02 | 1995-08-18 | Nec Corp | Data identification regeneration circuit |
-
1981
- 1981-03-02 JP JP56029509A patent/JPS57143963A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62112435A (en) * | 1985-11-12 | 1987-05-23 | Nec Corp | Signal decoder |
JPH07221800A (en) * | 1994-02-02 | 1995-08-18 | Nec Corp | Data identification regeneration circuit |
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